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| author | Sven Eisenhauer <sven@sven-eisenhauer.net> | 2023-11-10 15:11:48 +0100 |
|---|---|---|
| committer | Sven Eisenhauer <sven@sven-eisenhauer.net> | 2023-11-10 15:11:48 +0100 |
| commit | 33613a85afc4b1481367fbe92a17ee59c240250b (patch) | |
| tree | 670b842326116b376b505ec2263878912fca97e2 /Bachelor/Mikroprozessorsysteme2/mi2 | |
| download | Studium-master.tar.gz Studium-master.tar.bz2 | |
Diffstat (limited to 'Bachelor/Mikroprozessorsysteme2/mi2')
102 files changed, 7805 insertions, 0 deletions
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Doku/ARMQuickReferenz.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Doku/ARMQuickReferenz.pdf Binary files differnew file mode 100644 index 0000000..52db896 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Doku/ARMQuickReferenz.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Doku/AT91EB63_User_Guide.PDF b/Bachelor/Mikroprozessorsysteme2/mi2/Doku/AT91EB63_User_Guide.PDF Binary files differnew file mode 100644 index 0000000..e723804 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Doku/AT91EB63_User_Guide.PDF diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Doku/AT91M63200_Compelte.PDF b/Bachelor/Mikroprozessorsysteme2/mi2/Doku/AT91M63200_Compelte.PDF new file mode 100644 index 0000000..f015814 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Doku/AT91M63200_Compelte.PDF @@ -0,0 +1,1973 @@ +%PDF-1.3
%
+15038 0 obj
<<
/Linearized 1
/O 15043
/H [ 8752 3218 ]
/L 2105923
/E 85642
/N 153
/T 1805042
>>
endobj
xref
15038 403
0000000016 00000 n
0000008420 00000 n
0000008611 00000 n
0000008646 00000 n
0000008707 00000 n
0000011970 00000 n
0000012229 00000 n
0000012302 00000 n
0000012423 00000 n
0000012561 00000 n
0000012765 00000 n
0000012971 00000 n
0000013099 00000 n
0000013234 00000 n
0000013383 00000 n
0000013537 00000 n
0000013681 00000 n
0000013873 00000 n
0000013996 00000 n
0000014143 00000 n
0000014308 00000 n
0000014472 00000 n
0000014632 00000 n
0000014793 00000 n
0000014953 00000 n
0000015099 00000 n
0000015244 00000 n
0000015436 00000 n
0000015564 00000 n
0000015695 00000 n
0000015841 00000 n
0000015988 00000 n
0000016138 00000 n
0000016291 00000 n
0000016498 00000 n
0000016632 00000 n
0000016769 00000 n
0000016926 00000 n
0000017082 00000 n
0000017228 00000 n
0000017369 00000 n
0000017510 00000 n
0000017651 00000 n
0000017804 00000 n
0000017971 00000 n
0000018137 00000 n
0000018292 00000 n
0000018442 00000 n
0000018595 00000 n
0000018740 00000 n
0000018937 00000 n
0000019133 00000 n
0000019290 00000 n
0000019407 00000 n
0000019552 00000 n
0000019713 00000 n
0000019912 00000 n
0000020062 00000 n
0000020188 00000 n
0000020334 00000 n
0000020452 00000 n
0000020570 00000 n
0000020727 00000 n
0000020868 00000 n
0000021011 00000 n
0000021248 00000 n
0000021374 00000 n
0000021509 00000 n
0000021666 00000 n
0000021823 00000 n
0000021979 00000 n
0000022135 00000 n
0000022290 00000 n
0000022448 00000 n
0000022605 00000 n
0000022752 00000 n
0000022906 00000 n
0000023059 00000 n
0000023204 00000 n
0000023352 00000 n
0000023502 00000 n
0000023656 00000 n
0000023800 00000 n
0000023941 00000 n
0000024079 00000 n
0000024264 00000 n
0000024398 00000 n
0000024529 00000 n
0000024669 00000 n
0000024823 00000 n
0000025026 00000 n
0000025152 00000 n
0000025294 00000 n
0000025453 00000 n
0000025611 00000 n
0000025769 00000 n
0000025934 00000 n
0000026094 00000 n
0000026256 00000 n
0000026418 00000 n
0000026577 00000 n
0000026734 00000 n
0000026891 00000 n
0000027051 00000 n
0000027210 00000 n
0000027357 00000 n
0000027507 00000 n
0000027655 00000 n
0000027796 00000 n
0000027944 00000 n
0000028098 00000 n
0000028277 00000 n
0000028420 00000 n
0000028545 00000 n
0000028669 00000 n
0000028854 00000 n
0000029036 00000 n
0000029140 00000 n
0000029287 00000 n
0000029419 00000 n
0000029538 00000 n
0000029679 00000 n
0000029819 00000 n
0000029961 00000 n
0000030109 00000 n
0000030318 00000 n
0000030450 00000 n
0000030592 00000 n
0000030752 00000 n
0000030911 00000 n
0000031068 00000 n
0000031223 00000 n
0000031381 00000 n
0000031538 00000 n
0000031694 00000 n
0000031853 00000 n
0000032011 00000 n
0000032167 00000 n
0000032327 00000 n
0000032488 00000 n
0000032648 00000 n
0000032802 00000 n
0000032957 00000 n
0000033111 00000 n
0000033258 00000 n
0000033406 00000 n
0000033553 00000 n
0000033699 00000 n
0000033854 00000 n
0000033996 00000 n
0000034134 00000 n
0000034269 00000 n
0000034407 00000 n
0000034551 00000 n
0000034755 00000 n
0000034894 00000 n
0000035028 00000 n
0000035183 00000 n
0000035348 00000 n
0000035512 00000 n
0000035677 00000 n
0000035839 00000 n
0000035997 00000 n
0000036154 00000 n
0000036311 00000 n
0000036465 00000 n
0000036617 00000 n
0000036763 00000 n
0000036903 00000 n
0000037049 00000 n
0000037195 00000 n
0000037345 00000 n
0000037503 00000 n
0000037648 00000 n
0000037794 00000 n
0000037941 00000 n
0000038142 00000 n
0000038268 00000 n
0000038394 00000 n
0000038536 00000 n
0000038728 00000 n
0000038861 00000 n
0000038998 00000 n
0000039150 00000 n
0000039296 00000 n
0000039447 00000 n
0000039631 00000 n
0000039778 00000 n
0000039908 00000 n
0000040032 00000 n
0000040181 00000 n
0000040368 00000 n
0000040499 00000 n
0000040631 00000 n
0000040762 00000 n
0000040908 00000 n
0000041067 00000 n
0000041208 00000 n
0000041352 00000 n
0000041494 00000 n
0000041681 00000 n
0000041804 00000 n
0000041944 00000 n
0000042083 00000 n
0000042231 00000 n
0000042346 00000 n
0000042472 00000 n
0000042613 00000 n
0000042748 00000 n
0000042885 00000 n
0000043080 00000 n
0000043220 00000 n
0000043361 00000 n
0000043485 00000 n
0000043626 00000 n
0000043769 00000 n
0000043910 00000 n
0000044015 00000 n
0000044118 00000 n
0000044219 00000 n
0000044320 00000 n
0000044422 00000 n
0000044524 00000 n
0000044626 00000 n
0000044728 00000 n
0000044830 00000 n
0000044932 00000 n
0000045034 00000 n
0000045136 00000 n
0000045238 00000 n
0000045340 00000 n
0000045442 00000 n
0000045544 00000 n
0000045646 00000 n
0000045749 00000 n
0000045852 00000 n
0000045955 00000 n
0000046058 00000 n
0000046161 00000 n
0000046264 00000 n
0000046367 00000 n
0000046470 00000 n
0000046573 00000 n
0000046676 00000 n
0000046779 00000 n
0000046882 00000 n
0000046985 00000 n
0000047088 00000 n
0000047191 00000 n
0000047294 00000 n
0000047397 00000 n
0000047500 00000 n
0000047603 00000 n
0000047706 00000 n
0000047809 00000 n
0000047912 00000 n
0000048015 00000 n
0000048118 00000 n
0000048221 00000 n
0000048324 00000 n
0000048427 00000 n
0000048530 00000 n
0000048633 00000 n
0000048736 00000 n
0000048839 00000 n
0000048942 00000 n
0000049045 00000 n
0000049148 00000 n
0000049251 00000 n
0000049354 00000 n
0000049457 00000 n
0000049560 00000 n
0000049663 00000 n
0000049766 00000 n
0000049869 00000 n
0000049972 00000 n
0000050075 00000 n
0000050178 00000 n
0000050281 00000 n
0000050384 00000 n
0000050487 00000 n
0000050590 00000 n
0000050693 00000 n
0000050796 00000 n
0000050899 00000 n
0000051002 00000 n
0000051105 00000 n
0000051208 00000 n
0000051311 00000 n
0000051414 00000 n
0000051517 00000 n
0000051620 00000 n
0000051723 00000 n
0000051826 00000 n
0000051929 00000 n
0000052032 00000 n
0000052135 00000 n
0000052238 00000 n
0000052341 00000 n
0000052444 00000 n
0000052547 00000 n
0000052650 00000 n
0000052753 00000 n
0000052856 00000 n
0000052959 00000 n
0000053062 00000 n
0000053165 00000 n
0000053268 00000 n
0000053371 00000 n
0000053474 00000 n
0000053577 00000 n
0000053680 00000 n
0000053783 00000 n
0000053886 00000 n
0000053989 00000 n
0000054092 00000 n
0000054195 00000 n
0000054298 00000 n
0000054401 00000 n
0000054504 00000 n
0000054607 00000 n
0000054710 00000 n
0000054813 00000 n
0000054916 00000 n
0000055019 00000 n
0000055122 00000 n
0000055225 00000 n
0000055328 00000 n
0000055431 00000 n
0000055534 00000 n
0000055637 00000 n
0000055740 00000 n
0000055843 00000 n
0000055946 00000 n
0000056049 00000 n
0000056152 00000 n
0000056255 00000 n
0000056358 00000 n
0000056461 00000 n
0000056564 00000 n
0000056667 00000 n
0000056770 00000 n
0000056873 00000 n
0000056976 00000 n
0000057079 00000 n
0000057182 00000 n
0000057285 00000 n
0000057388 00000 n
0000057491 00000 n
0000057594 00000 n
0000057697 00000 n
0000057800 00000 n
0000057903 00000 n
0000058006 00000 n
0000058109 00000 n
0000058212 00000 n
0000058315 00000 n
0000058418 00000 n
0000058521 00000 n
0000058624 00000 n
0000058727 00000 n
0000058830 00000 n
0000058933 00000 n
0000059036 00000 n
0000059139 00000 n
0000059242 00000 n
0000059345 00000 n
0000059448 00000 n
0000059551 00000 n
0000059768 00000 n
0000059951 00000 n
0000059975 00000 n
0000060837 00000 n
0000060861 00000 n
0000061961 00000 n
0000062759 00000 n
0000063402 00000 n
0000064132 00000 n
0000064710 00000 n
0000065601 00000 n
0000065625 00000 n
0000066708 00000 n
0000066732 00000 n
0000067756 00000 n
0000067780 00000 n
0000068378 00000 n
0000068685 00000 n
0000068890 00000 n
0000069131 00000 n
0000069925 00000 n
0000070014 00000 n
0000071092 00000 n
0000071117 00000 n
0000072328 00000 n
0000072353 00000 n
0000073627 00000 n
0000073651 00000 n
0000079178 00000 n
0000084358 00000 n
0000084439 00000 n
0000084519 00000 n
0000008752 00000 n
0000011945 00000 n
trailer
<<
/Size 15441
/Info 15018 0 R
/Root 15039 0 R
/Prev 1805029
/ID[<303e736c10e99aa84622a28a8ee5b6f1><303e736c10e99aa84622a28a8ee5b6f1>]
>>
startxref
0
%%EOF
15039 0 obj
<<
/Type /Catalog
/Pages 15030 0 R
/Outlines 15044 0 R
/Threads 15040 0 R
/Names 15042 0 R
/OpenAction [ 15043 0 R /XYZ null null null ]
/PageMode /UseOutlines
>>
endobj
15040 0 obj
[
15041 0 R
]
endobj
15041 0 obj
<<
/I << /Title (A)>>
/F 15254 0 R
>>
endobj
15042 0 obj
<<
/Dests 15017 0 R
>>
endobj
15439 0 obj
<< /S 4485 /O 5248 /E 5264 /Filter /FlateDecode /Length 15440 0 R >>
stream
+HU{TSG$4.Bj*jS +z] ,{<$1 +۵4 r-H}@XEሲJ,A(tAmSk² 37 &ɽf~ +hEYJcdR&beT+k(LWA(RH8Χ:r45F6H +!'
>Ϫ~R +g 4m`Py6:Sm]U?VNcn$Vf'b [P` ǣ
ҢCl(UQp%OM)! h2!]t\!IwJ6_SvR]|ˀ + '!oo;l#)@ /) nSH5xx ~њ?}|w`s%A,x +@ ܻP: f Inba>nOZ}<q86)@84Ck;u\?=Iӣ ³11É ǮzP`Pcy.M F0UЎQXNCܰ\U +2G5 +Ϯ<??L3s!n(ʫ2y2.NҢI:,}cw`'LH[k̬<7J w/O$A@7 w
W=8qd+٤
" PRuC "[("JD6ٺ Cix!**ySY{e 'y|FXSxS3W5г*].t"_]W!8< eн\ +IW,O>oicI!ǜwp 35I۾B12Fsm|x6WEjHOh+ 9O +OOm7RCQMk + Osr +XȦ|-ԧw*m0v 7V>yzrj]< gLJ;2~i.oWTܸ$!Fx ;iw3n +X>\bOuf He詔o}5H04Q6=XagMƈX<b)X1Թzj4y<bs4XO RkS Q +1ZQ_X0c[rd¾N E;KKfXX;G +!'
>Ϫ~R +g 4m`Py6:Sm]U?VNcn$Vf'b [P` ǣ
ҢCl(UQp%OM)! h2!]t\!IwJ6_SvR]|ˀ + '{i* ;gc6)ۻLCkBehDVT$G {?R8 o# +إę +!B/l/:]Cc^ u҆PkHq q3O&=8LJ/ۨC~Ѯx>Ux
#52a 3<\4Z0^JߙHI[2 +F7D9Ux#~N3 'gY3P`ͬt-('97bG*$͑P#D; xVlUxe\kک$s ǫl)غh Q.$B,#M fh|k99Ov:bDW eqJse9h[r(d/NmS2^?r
mI0~ZI"H1iyˍZ& x 'I&f+kTE +Hn1 Y#b'κJH,P,PA.x}~%QU2q~;^^^~!eI\"V6SϷ% 32
cy(HA 8*qucZ]%؟#NJ pU"V/4 <y6x +hu + S춒j(!()j럐n +y
gm^=rN} Y+*($F 0;!\e2]F + g@,3b2WtqccN=H32Br+Sn.K<hz'ϹB|: < +&-I{Ӝ9'Qd< _Q
c{I Rz$tdjGhb1 $ + c 伱V aG;YUsFG +1GFRgKüTM76|O:P- |d?j6*lFq>/JrMX*Qײ'vfZX;ۗufrHº,^w$H;΄DVsd}9ۙ|t?nqDVwH}2y4? pJQhoܯu|=>? +HUɮS1 ߯Ď3|X ,$t`s 7eYUU{NlSlciu)&'glfI&%slr~2;l#T<${l+_$(KQlJi2
X:#!6+L!%{KU.Rn1l](E)+搻!KZp l=2Er̾0G>FQ '6zjDit9N%z&#+H2eq1cgs6vT ]Ȕz]la?dٳfP3zP{n2-?gr7(K)4. Nۃ b{F> +C dkdqT l:r 8>` W3K\GC4ljR͋{"ҲΆW!!wH ^L;E~k>k 1&#bxuR]Ė1e<Gix@) A -8IW6 ]%T]'!V08=)=15rn:Y.-Gt8`oaQelF㋾B% KRUL`va#B'Kf%m6Ş3 +q;|ߦգIN LyMm#뚏Pr,ȯgBtO3\g@1=I鰢)b IUKqe=K <V"nOS?' +HUn9 )x4c8Xn"v-' 1eb K3.)?I[ - "ŏG +z.r(M2H +WIܻ1``<a^/.2yQvuJZ^ +)}Q?{&ӵfuV&w.Fiv 7~6wWo_)9 ˵538Mhi\?{ ;a.ڿ*!^jR)ga@]h0r)U:O2N*]dzHY-R]g3/eA{[ ґㇽrlZS^-yc~GT8%+ܭ}r:NIID>@KLK @#2a!T4(1{a/t%{aAdNN*Εp
ЖaYM.dVɤ.\>FW*T$ QQ(5N(zn;e^ E>I$|<@2a.BɌvm[0Bl 9& U r7lS"Ňofq5)ڃ/ Ceܱ
u6ٽ9 Jbg*i&y T(puv qJڭt*{=Н~DzĤqt61%bl
$qDg!@KoT ҝ`8ꚣfvb!wğ?|{H7C/IO, 7 _J6QYxc +"/m IVyL +OÜ=9 i*ʟRB#. ĒƛL9\ض*ǀ<)'$gٌ=v0R^ fİC '-O"3;g !tks鱗 z:vap}ne ~3 {4g7EHJakD CJek:7E }P` +HVIO0+|q +ZAbF I۷8R i{#?Ya 8E??uI"2By8bOZ|cNDq`;I6F;0F\eA&* JK,,^ 7c,e HWaX-KV+ŕ?}~z7hfY +m+ǻt~1AhFܖc'pprxS]0+)b`Ղ&N+5-jg]B9 <iY\o ׁ#}y1f,L[ű9DDE;Zm %{K87& &2&2L&SDX
gdSbly0XMJ2ԑ1hc!h6#eyYɺ" r@Hřq4 !5pHC49ji |џ26qO7~ $X] +3vֲJTMňS`h ~GA^9zG褎ewּOI^Yb6Km
63l)UBjW} U95=,8=u"/N ai| ^I \s hD]ԨDh &Q5B-W~RyHJ+#* ÏJDh7bvlw .. +"Eb\vqxod#;_e٤;?vp!e.+kb' 8˞( +Hbd`ab`ddsuvsMa!C qM <,?x~{گ6V!$8߳ghb`addMMMO400300w/,L(QHT00`DZ(8'*W+x%%)(8(M(V(J-N-*B] a c;B`O10a?f<wngfό4zw'O8l90m
I[5v̲O1i̮#}wDFlo,ڳtqɋs&^K`6DzX9..U1N9/lSx7_7~zfwP!{fƽ Eﺟpw쑳8qs";wq{#~^y{u +Tm]w@6oHo{!+_՜G`{ +endstream
endobj
15423 0 obj
<< /Filter /FlateDecode /Length 230 >>
stream
+HTPn -/JRXk\8Iam! a\ 9)#vvgL0b=*WwJ @x:vta 378M= +endstream
endobj
15424 0 obj
<<
/Type /Font
/Subtype /Type1
/FirstChar 1
/LastChar 3
/Widths [ 400 768 549 ]
/Encoding 15427 0 R
/BaseFont /ECCNNB+Symbol
/FontDescriptor 15425 0 R
/ToUnicode 15423 0 R
>>
endobj
15425 0 obj
<<
/Type /FontDescriptor
/Ascent 0
/CapHeight 0
/Descent 0
/Flags 4
/FontBBox [ -180 -293 1090 1010 ]
/FontName /ECCNNB+Symbol
/ItalicAngle 0
/StemV 95
/CharSet (/multiply/degree/Omega)
/FontFile3 15422 0 R
>>
endobj
15426 0 obj
<<
/Type /Font
/Subtype /Type1
/FirstChar 32
/LastChar 181
/Widths [ 278 278 355 556 556 889 667 191 333 333 389 584 278 333 278 278 556
556 556 556 556 556 556 556 556 556 278 278 584 584 584 556 1015
667 667 722 722 667 611 778 722 278 500 667 556 833 722 778 667
778 722 667 611 722 667 944 667 667 611 278 278 278 469 556 333
556 556 500 556 556 278 556 556 222 222 500 222 833 556 556 556
556 333 500 278 556 500 722 500 500 500 334 260 334 584 278 278
278 278 278 278 278 278 278 278 278 278 278 278 278 278 278 278
278 278 278 278 278 278 278 278 278 278 278 278 278 278 278 278
278 556 556 278 278 278 278 278 737 278 278 278 278 278 278 278
584 278 278 278 556 ]
/Encoding /WinAnsiEncoding
/BaseFont /ECCMPC+Helvetica
/FontDescriptor 15413 0 R
>>
endobj
15427 0 obj
<<
/Type /Encoding
/Differences [ 1 /degree /Omega /multiply ]
>>
endobj
15428 0 obj
<< /Filter /FlateDecode /Length 15421 0 R >>
stream
+HVnF )8<HζY4QkCӃ,+ +[2l%ҷ NR`)D c5ITп/TM>|tʨqU^YlJ$N|7IduvL#Z}Bk%/BE&&Ns蘄MzrcrvcDžV"zՁ1hXg$6
+@ l<tPUq(('5 z hv`-{@`)=M @M7u0r/G流!]-Y$f&;,ɸf'06~? HL7W Lu&Y=`Ԫux{<kTVg(&]xRiZĹR$Vls{(y6v1Ob[M~n;u( ל$)N]Eǖ +)Ɓ{ +{ݯTLxR<P rP4YoZmXvTlKS= +W㊭NO5|PBhUwܩ[e 77PS +vIBNfxޯL 3 52i+&@Rp]&JsHY)gbiE.zP_1 6>#N2YzWmCO-Kfb l"a낭}
@d^ +HVKo8^+x$"R `)=2m%Vip~l"|#-/iֈfi^e ĬۅW~rʤ' +}fYj 4>IIs*-G1)]Qei%E{T9<_2k,JJ#~t! 1x]GՔ OZԒU: +Hn#FZ!'(m-_ZM*m>YLS3P*7UQi!Bza~z)s8{AB~ T #YDp_Mi[@B6g0|ǓqNՀ r;q`Cl"5A`)o
@!a6⚨CB-'`ֆxT7sp80WD&N\Zh
~د.P>z+ +q:Vpa +MM +Hn6,,cRhqO9(2m%Ò'mtE/"W/+Z4jھ]0i[X8Oi LҤN' /@fx3Iz=L"T{> pdTע Ř g [Sm/<A= SHK8zxڈEϭamT퉰%)n&Kk͒Aj/ƅ61_9 FE:'a\4X +
d=A.ZZ<L e9~c&;lHPNl躑Qj B)4)eh)ؐ _@M^QS1nM:z 3qܔ<~ů[<fEh<p19 !LPg$Jpn3fWܮ?C +ڝf4bpJ^␀v"qUDbw ]ac2Y(H2Kdg_,@gWD҄XMKhꡚ)3և~9I%zD8 +WṉMq_u,Fͽh +u 4[ 7i(t l*GG0Vbƽpu0ᯍ !jw〵,}u喘&q9zI_LJ6^NW1kaD=ߍ,dyA3A[- +HlT{XWIL@a&X "%" BKkժȣuV">Z_HKQ nw ݙ3sIL@$i MuIaNNpcHn+ ̸9o oEE[KvZ1J !I+jOwzJ`F,'+&<Mv>#vڰV'g,תWgi٪̌,^RFvVeiY=M.[Q44MJUFj.=C:SQiғ=2T: <[d !b;BArbA& Ad bA $X^+ b9!N A ME" [E3{*Z%HjM.tGsŻis U[X[YZ5sAK'K?|}O>Zk%
֤2s֯m2l*mn +m}lm+m{nMnƎd%{ڳIl }d2) |%vi'%PL8?VHNJPȍq]4 NwÐ" +1E6Gχ a͑}Xyh;$3HQ
` 16n"UԷ?ˮ]P4`'{achĈI + ,>a?o F<GyMFVV uc{Q߷l6*\Aq +fr [
4s/Kt +9J72QLE4Q6({vȞ9|og?ٛU,gt FV@M i2LV?)&@Up D3Q]&Í]0"EyWp=<9 t guͦgB QwI+A$ +hjDU vXL 4L5@*FG>O$MTܺ%͊xzo/a̻|YB,zB0hу<gǁaWI-yh79l[EBIU#y
&!7~e1(%~ 1HadX +]jp%$@B
" +2^=&Ce
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aA
LA]p!A9T_|siP7O1b +endstream
endobj
15435 0 obj
<< /Filter /FlateDecode /Length 5085 /Subtype /Type1C >>
stream
+H\U
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A>jL"LyXPN3~]`s0 E a~ tFJ}W xêgVNʠxǞ XD,^.vL#d`J!Jho)E&8Wtp':EǕ97=7ׂ&qd +X e R XNY,sM2ՀN%'!D6'U߈ ,3 HA~Xk \6<{}4v SKD`$>6_+ +pI B U0Ud D&=('HM܍0Sc1 x1+ <~r8Ͱ" +Dm"D
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endobj
15436 0 obj
<<
/Type /ExtGState
/SA false
/SM 0.02
/TR /Identity
>>
endobj
15437 0 obj
<<
/Type /ExtGState
/SA true
/SM 0.02
/TR /Identity
>>
endobj
15438 0 obj
<< /Filter /FlateDecode /Length 15433 0 R >>
stream
+H|Un1WFm R8D IOlLfX~)= %˵Wm3<k!°57bXi<ʶSX@yX6*'FXT[Ɗ$ۤ JjjU+88lyXWӣ 9.6:W˥t* jLҪ$ -ϻL5Șs,><gǬ>ʏT<Dkky*U ۀ)%S̼x,o
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8hD +ze>־}w̖ 6T'#lG{k\r4* 3t7]<M1Qw^Q@'87(:*WhPn]P6g;Lv:S̙ngC͝pg˅M[{3_˦5ם 9)s|CyV
>%w'N% x39MUN;mF37(wfa IIűcSdǖxRkH'7 ϝ݃|[ Ga1 >UF:p ֮Ҳq/YBu%rou +\ae9ws !GW'p6.LuXARj FD p" ewĶ0/[6;0Q: :2yn ev k_)8Fw 9 VƖ _B<C
ͼ(T us Ǘ'3 pG6)ɐjRGiJVbTTmO`֧̅Fv֕ +т.S2($<!g[z#\\}(;#",;2tDg +Fiy?ưYWiɪ(Q' 97B#=^>}#YwR]hQ1PLdfĴ?z d&O߽=M-#͐MD }%z4ǵco 47PQ<NOVѻfL:M8^V
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К7r8yꛬ-[B<lMwnY'Me(:R}̿7kDLDEkQʍH[}jxo^<Ń\<pk +Dq%nJ
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8Xwu ;mW9 ԆjrZßcVdXG{-x1<`K]_gLm(xv Qp$xE<pfgKtAז"hS)/EІT44Pz{DޮAGP=<JfϮ-y6r;sJSuU <UKfK {ۮ{z?G 0 +HWMs"9+tژ*q쵱ój7@dT +[N~ TVZ6ª9j k) b<^<ʦE[:Bu,Dtvpqmo[{h!IgBRKY Rź 1ÂnQVwkksj6}%l_ERDau-p֍0hL>ݖ>iV*C=I(\.I!s@.t_jbHnG`Ų
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!^]7~'5 +endstream
endobj
17 0 obj
<<
/Type /Page
/Parent 15019 0 R
/Resources 18 0 R
/Contents 19 0 R
/CropBox [ 0 0 612 791 ]
/B [ 15259 0 R ]
/MediaBox [ 0 0 612 792 ]
/Rotate 0
>>
endobj
18 0 obj
<<
/ProcSet [ /PDF /Text ]
/Font << /F3 15412 0 R /F4 15426 0 R >>
/ExtGState << /GS1 15436 0 R /GS2 15437 0 R >>
/ColorSpace << /Cs5 15407 0 R >>
>>
endobj
19 0 obj
[
870 0 R 872 0 R 21 0 R
]
endobj
20 0 obj
9837
endobj
21 0 obj
<< /Filter /FlateDecode /Length 20 0 R >>
stream
+HWKs
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2A2\J&k%KsA|_4o{"IѾ$#;YE N$ƍ1b(3P&xYUZ"u၊;@=+Xm+.Denn).e"hNN{PuM;հb`tl
:D-ݩ<%֨u.d˵,$|P]cs 4~)U3OHwc
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endstream
endobj
284 0 obj
<<
/Type /Page
/Parent 15024 0 R
/Resources 285 0 R
/Contents 286 0 R
/CropBox [ 0 0 612 791 ]
/B [ 15302 0 R ]
/MediaBox [ 0 0 612 792 ]
/Rotate 0
>>
endobj
285 0 obj
<<
/ProcSet [ /PDF /Text ]
/Font << /F1 15414 0 R /F3 15412 0 R /F4 15426 0 R >>
/ExtGState << /GS1 15436 0 R /GS2 15437 0 R >>
>>
endobj
286 0 obj
[
866 0 R 288 0 R
]
endobj
287 0 obj
1577
endobj
288 0 obj
<< /Filter /FlateDecode /Length 287 0 R >>
stream
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endobj
848 0 obj
[
/Indexed 15407 0 R 255 849 0 R
]
endobj
849 0 obj
<< /Length 250 /Filter /FlateDecode >>
stream
+H1 +]IE+8$HZKHdRKoO{</x( +endstream
endobj
850 0 obj
<<
/Type /Font
/Subtype /Type1
/FirstChar 32
/LastChar 181
/Widths [ 278 333 474 556 556 889 722 238 333 333 389 584 278 333 278 278 556
556 556 556 556 556 556 556 556 556 333 333 584 584 584 611 975
722 722 722 722 667 611 778 722 278 556 722 611 833 722 778 667
778 722 667 611 722 667 944 667 667 611 333 278 333 584 556 333
556 611 556 611 556 333 611 611 278 278 556 278 889 611 611 611
611 389 556 333 611 556 778 556 556 500 389 280 389 584 278 278
278 278 278 278 278 278 278 278 278 278 278 278 278 278 278 278
278 278 278 278 278 278 278 278 278 278 278 278 278 278 278 278
278 556 556 278 278 278 278 278 737 278 278 278 278 278 278 278
584 278 278 278 611 ]
/Encoding /WinAnsiEncoding
/BaseFont /ECGNJJ+Helvetica-BoldOblique
/FontDescriptor 856 0 R
>>
endobj
851 0 obj
<<
/Type /Font
/Subtype /Type1
/FirstChar 32
/LastChar 181
/Widths [ 278 278 355 556 556 889 667 191 333 333 389 584 278 333 278 278 556
556 556 556 556 556 556 556 556 556 278 278 584 584 584 556 1015
667 667 722 722 667 611 778 722 278 500 667 556 833 722 778 667
778 722 667 611 722 667 944 667 667 611 278 278 278 469 556 333
556 556 500 556 556 278 556 556 222 222 500 222 833 556 556 556
556 333 500 278 556 500 722 500 500 500 334 260 334 584 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 333 333 0 0 0 0 0 0 0 0 0 0 0 278
0 556 556 0 0 0 0 0 737 0 0 0 333 0 0 0 584 0 0 0 556 ]
/Encoding /WinAnsiEncoding
/BaseFont /ECGNKF+Helvetica-Oblique
/FontDescriptor 858 0 R
>>
endobj
852 0 obj
<<
/Type /Font
/Subtype /Type1
/FirstChar 32
/LastChar 181
/Widths [ 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600
600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600
600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600
600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600
600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600
600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600
600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600
600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600
600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600
600 600 600 600 600 ]
/Encoding /WinAnsiEncoding
/BaseFont /ECNMLA+Courier
/FontDescriptor 860 0 R
>>
endobj
853 0 obj
<<
/Type /Font
/Subtype /Type1
/FirstChar 32
/LastChar 181
/Widths [ 278 278 355 556 556 889 667 191 333 333 389 584 278 333 278 278 556
556 556 556 556 556 556 556 556 556 278 278 584 584 584 556 1015
667 667 722 722 667 611 778 722 278 500 667 556 833 722 778 667
778 722 667 611 722 667 944 667 667 611 278 278 278 469 556 333
556 556 500 556 556 278 556 556 222 222 500 222 833 556 556 556
556 333 500 278 556 500 722 500 500 500 334 260 334 584 278 278
278 278 278 278 278 278 278 278 278 278 278 278 278 278 278 278
278 278 278 278 278 278 278 278 278 278 278 278 278 278 278 278
278 556 556 278 278 278 278 278 737 278 278 278 278 278 278 278
584 278 278 278 556 ]
/Encoding /WinAnsiEncoding
/BaseFont /ECGNKF+Helvetica-Oblique
/FontDescriptor 858 0 R
>>
endobj
854 0 obj
<<
/Type /Font
/Subtype /Type1
/FirstChar 32
/LastChar 181
/Widths [ 250 333 408 500 500 833 778 180 333 333 500 564 250 333 250 278 500
500 500 500 500 500 500 500 500 500 278 278 564 564 564 444 921
722 667 667 722 611 556 722 722 333 389 722 611 889 722 722 556
722 667 556 611 722 722 944 722 722 611 333 278 333 469 500 333
444 500 444 500 444 333 500 500 278 278 500 278 778 500 500 500
500 333 389 278 500 500 722 500 500 444 480 200 480 541 250 250
250 250 250 250 250 250 250 250 250 250 250 250 250 250 250 250
250 250 250 250 250 250 250 250 250 250 250 250 250 250 250 250
250 500 500 250 250 250 250 250 760 250 250 250 250 250 250 250
564 250 250 250 500 ]
/Encoding /WinAnsiEncoding
/BaseFont /EDBBCL+Times-Roman
/FontDescriptor 862 0 R
>>
endobj
855 0 obj
<<
/Type /Font
/Subtype /Type1
/FirstChar 32
/LastChar 181
/Widths [ 250 333 500 500 500 889 833 250 333 333 444 606 250 389 250 315 500
500 500 500 500 500 500 500 500 500 250 250 606 606 606 444 833
722 667 685 778 611 556 778 778 389 389 722 611 944 778 833 667
833 722 556 611 778 667 1000 722 611 667 333 606 333 606 500 333
556 537 444 556 444 333 500 556 333 333 556 333 833 556 556 556
537 389 444 389 556 556 833 500 556 500 333 606 333 606 250 250
250 250 250 250 250 250 250 250 250 250 250 250 250 250 250 250
250 250 250 250 250 250 250 250 250 250 250 250 250 250 250 250
250 500 500 250 250 250 250 250 747 250 250 250 250 250 250 250
606 250 250 250 556 ]
/Encoding /WinAnsiEncoding
/BaseFont /EDKAAG+Palatino-BoldItalic
/FontDescriptor 864 0 R
>>
endobj
856 0 obj
<<
/Type /FontDescriptor
/Ascent 718
/CapHeight 718
/Descent -207
/Flags 262240
/FontBBox [ -174 -228 1114 962 ]
/FontName /ECGNJJ+Helvetica-BoldOblique
/ItalicAngle -12
/StemV 140
/XHeight 532
/CharSet (/N/e/E/space/W/t/A/asterisk/colon/o/R/D)
/FontFile3 857 0 R
>>
endobj
857 0 obj
<< /Filter /FlateDecode /Length 1040 /Subtype /Type1C >>
stream
+HlQmL[U>RW6t#$K/R(k˗1nB _+T- b`3bCL{ʁb?<'99ϓyb4Ԋr᪪징NnpyZ\G% +6lzcNx'dA<"
Y"WYE
Gdbܐy(PE"a!_xn2jpC<촅ĐEH7_cM mL0+B +w pw/oXdgpeIp8<8N oPD13ab #8{6 +endstream
endobj
858 0 obj
<<
/Type /FontDescriptor
/Ascent 718
/CapHeight 718
/Descent -207
/Flags 96
/FontBBox [ -170 -225 1116 931 ]
/FontName /ECGNKF+Helvetica-Oblique
/ItalicAngle -12
/StemV 88
/XHeight 523
/CharSet (/t/l/e/quotedbl/hyphen/quotedblright/u/nine/f/I/H/period/v/colon/h/P/sla\
sh/w/i/F/L/d/y/n/zero/j/N/M/one/k/O/equal/A/two/m/Q/x/three/o/parenleft/\
R/K/underscore/p/quotedblleft/S/parenright/E/five/U/T/B/r/space/six/g/b/\
C/s/W/c/a/D/comma)
/FontFile3 859 0 R
>>
endobj
859 0 obj
<< /Filter /FlateDecode /Length 3992 /Subtype /Type1C >>
stream
+HlT PT]PE $ +"H6 +.fcaVXuD3ĩZcWf!!]]׳i;=w ,ǰ,;zܴEoNoZc5s
ውke&le#GTbӰ1hcU6fko?:WF0xG b8U=x]g-,Z_b^nnRd]T\쌩5fhqz]R^Ѥ\o)5Xtks K +K .iݐd1X:EgЕL|]*E&]Rΰ6/DgXKb3J&_DR0, cr&e4,#2x2SX0L13L9$Q)c2 sL xdv5{/w2FV =_\3s{3<Gh.hEXѨ1la ,j࿂҂= :bqND]٤ ~=6ʄ,er?Ʌ ֶK$Wb`G2xӟY)gv}O F,_>ԋ j (!N.>/a0%{0q
C 3{uVO7eM?k `;d!
[l'c4'ȕu;dpXU2z ,g_LHq`%W^Nc.8뒑Dx(`JHަq"B 41s0 C1C䜀|6+ + z2T+*P1b[\re ?#.u"o k+0Zєek笔"q/MO܌ +R/ ]j;9K%Pi`d;*EulL(
ծ:ҝ]j1BPz}`i|ۛ okT?f-]K'l>wq .4zFh?K5LK/Jԏ7m@;a%4y +JYd?*#`ncЏ? CNQ`>CCu
w 4ٞ`Rx5i%ü\oFp{%5 }q5"nZLf<4!++T\^IƮsNGI +) DžZ4 +ñqsv§'p ~l-.H AHK)H zdC$3 t>-w +( 1=n$UMN(rNxw l"cޱPD^wz?4TsJ'=x;*Mtz;ht:]NPvI 5Do \E1щczl71 +aCp_|v*M C/* 9 g8؋ @tl8=A/
d[5H6t<5! #r\x4>AmU755<xpFzhE̯[5Yr &l <@- PQ1ӧ=O RI301 QpKtMz&=!--6= +, }耜p 8ʿ?ß$Tդ Y+tJl':p(# 1uع W c[N< (Vkk| w +X5Ꚇ.~6 qxט?BD*^]Xtg |hOYX}(Y51Ť:
OƂja):[? fqcpm['&ɻ8f6 ;CQѬey\J/uK1/
_8AO* +<Q5I4 0ב-8yl~LyBv m)A]*YkzDFL73p*DS؎Ƈ +y,$N@ 3t|q-{# +pNb:ԅ #)<-CoF>yZ5* DW^̽ڬt#{R7(%໘U;& kb +ȁk^KCt#Yg'h^~%=|Fq-#6k]XqѰꜦ4(k"S)9)&Hd naB*?,-indvpY~/%0Y5q7O`VfRY͑Go5uDkYr|3hKe)hF"ʅ[5MQN/ +; +2SQ72qؤ}#FZh8U
+K2٫ =
+endstream
endobj
860 0 obj
<<
/Type /FontDescriptor
/Ascent 629
/CapHeight 562
/Descent -157
/Flags 35
/FontBBox [ -28 -250 628 805 ]
/FontName /ECNMLA+Courier
/ItalicAngle 0
/StemV 51
/XHeight 426
/CharSet (/l/p/hyphen/ampersand/bracketright/r/space/P/F/zero/numbersign/two/C/bra\
cketleft/c/d/comma)
/FontFile3 861 0 R
>>
endobj
861 0 obj
<< /Filter /FlateDecode /Length 1349 /Subtype /Type1C >>
stream
+HLT
LWCkrpwj#b+'SANQ +QDkVGE3ؠՈTRKk[-̒Ӵ%ߛ̛ɣ)izЏ,[w6]3e=%{вJTˣ4]͊/3bMn[tBZ(5M;EFNlݞf )41gi~_A,ѱi)ےMcVۆ؍>&KBi(4dMT,PZj8Qޥ(?* +QPj)Q*JMeN8znRMWTvUzWMf?rF:9ܗu[B1Y҂*0f$?UB + 3mcDvPo&-oab9/v\r q]rQ˦/OߐD쨅YLbmBC Eյ+ L%u NŜ4I>Sw@v] c$*j[J_9^;%u= xmR}C
dаp8ނ
d0 ;AjeCEF{ PP
]K1 "\ 10 #p{R + ߆ ?%x*K:m$Gde } +endstream
endobj
862 0 obj
<<
/Type /FontDescriptor
/Ascent 699
/CapHeight 662
/Descent -217
/Flags 34
/FontBBox [ -168 -218 1000 898 ]
/FontName /EDBBCL+Times-Roman
/ItalicAngle 0
/StemV 84
/XHeight 450
/CharSet (/equal)
/FontFile3 863 0 R
>>
endobj
863 0 obj
<< /Filter /FlateDecode /Length 334 /Subtype /Type1C >>
stream
+Hbd`ab`ddvuqrrM-
M f!C I <bm~%*w7a*߯ +122rZjs~AeQfzFF4 @1%?)U!$5X3/9 ($5EOA1'G!dBBPjqjQPRbDĔĢl4̼ʂTGwļ"LҤ̔Ģb^/Ld_ ##> '.uq ~[SkﲩߋپϚv揰frQ<@7r +endstream
endobj
864 0 obj
<<
/Type /FontDescriptor
/Ascent 726
/CapHeight 681
/Descent -271
/Flags 262242
/FontBBox [ -170 -271 1073 926 ]
/FontName /EDKAAG+Palatino-BoldItalic
/ItalicAngle -10
/StemV 122
/XHeight 469
/CharSet (/n/p/l/e/S/E/hyphen/q/r/space/J/s/i/F/W/a/t/u/H/A/B/g/m/b/C/x/o/R/D/d)
/FontFile3 865 0 R
>>
endobj
865 0 obj
<< /Filter /FlateDecode /Length 4222 /Subtype /Type1C >>
stream
+Hl PSWo%777mqUtE:VC ŪGH MBB#rcn %"GK" (2Zu۱nz.^f7b8sf|\ +Q( JJI`4R($zގ |S@Jb0ә3 +\_V*? S(k: `ӆ=$EM|Oi=vϺ=@$KHDjt@FL~R&*6AR £D$+*rgjD! +raRrP&!Rs2Y_ H( $d"3A!IdūriD!ށ h } +X9 +wf)KD +L1pc&_I ^'"#D,a^ 엉'֠XB<c-7jt (XO}*O d:ApjgwٙrfÇ$_|ҔyTti)}Tc0D44 qĄu#5V$ژ 2x/+HTqLQu:\`!j]ܹױѮ /;/#).yMxpS9p,)<O1U:Rx|BalAV9m55>atsMB̰Ԥڰjblf=;`Ǫ 7afvY7 m<F "z4 (gW q/8`c$UG ɁUy8H~?ȇ%HxCe=G~kc
$gLR]Lrb#L\2bDǜGxYVy܁يY8VLNNG`, V a\$f}=#˚֭zrGYE= +c_ Td4nfS h0r6֧sjn7cv+*5gp +Xui'%0 `Q -G4 (̀as g+i-}x,`8I\dz,L'֤!"& =I j !&'!DͬRujz Y*ynZkLݜ=qju E $$<I HCC BDIP=V鵮^m7vxۃ[ws}^ gQMHD@\ܬc[ .o {:Āb`DFخWIc ƄKA9CoLzWB*,7σ ݮ` a +߿Dz$
cFq >y%AJ w#N[v]q_c+\I^QY7,U +DF 9@8/:}Rk8T/r'StY~ B*HvxO?p>WmG 1^gbA%He#Nx`PΗ7&:_58{i}[cCcT R]A6~VYT}t0O +J"Y%`9 QaMx[ zz=r>C֜|VvZj +$1k `hV7h5vZϛ<"d#>n/.Aw pFCP!K[T<)^Ǐ8T%{gKRC_-LL|~SBYHEqX]og<3jmѩq qFuM4be P6
4ث~e3;Dm~8 ~H@yzUgpkY#cn}T věb<& +ǻXp؝Y^[/Z]z #vT"7]b|U륐Am"6o
1gĎ=0NNT;rOlf3ܳP3kdvbE8 yb-kSUE +1liA"xY3G XtOGQqww={Z]Yd%y?Ym -\M,s貃QL |> Ӿ> Xm lĽ2,.FsX_#_3-o?,% Obwp){t0qvV\k%1y=ڃT8z1# g] W֝fJww- g09G-CIZHF5Uȷ ~SߦMi$ˣ9G|b xv]w\a9>eq<͈.qQ3G݇X +>0[DSGOYh7s x1{NBr5Kiʠ&CmހX PCC0כiQqj>(&2kh E(Y2Fi/i<ʹc)B6*lVUYf^L[WH+7 UocL5T$3
/n{| j*U%44$(O,<?QkM!NؽJZL\\}e/ Mwl./GfkWjkX!X؋|ֽ>58$oTT6ҏ3АB<X6+foɮawglAI "[؉R+DXWf cA ZW %5C41}&Ld +endstream
endobj
866 0 obj
<< /Filter /FlateDecode /Length 867 0 R >>
stream
+HMo0 :"u܀@ ءlHt;Jc Eݙolw _HPlSdl4MߟՄ$Mh]Rg ;W!<U+@)ysE,p?`6egwtq(| o | ̛:()g+X|̓nRi+h} Ge?ڍ4pN[JɱnHv oXEپ[ y6B6m~ =HJ<h#sOY3"AqJD_d7/(U/tKQT3AXt%%NM)jjqϿګ(rЂN & 侦ugEkXIN^@Gax + 2!YUΫd!0]#sPɩ[LAq"eB +?*>C R}Eڎf&9xՉ&np(2NV;b<GEuiL>8d,.gU~r= s_#O[|tOL'v*AADTzR + +M+ԻKxwl +H2PI0 +HUj[A Why.[h,J
]l6.]{>|'Y`{t =inn 9_,rIYCMOrq.J.^* +W[ԨM˘'rNin mOPixn{I9OWpq[>]o镩 q{>o$\G.dë? i?ۤ:DܾNFs&R}@,S +tO~i+#[# MlJVx @K *z +HR05735T01340T2PHd diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Doku/waage.htm b/Bachelor/Mikroprozessorsysteme2/mi2/Doku/waage.htm new file mode 100644 index 0000000..044cbc7 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Doku/waage.htm @@ -0,0 +1,147 @@ +<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2//EN"> +<html> +<head> + <meta http-equiv="CONTENT-TYPE" + content="text/html; charset=iso-8859-15"> + <title>waage</title> + <meta name="GENERATOR" content="OpenOffice.org 1.0.1 (Linux)"> + <meta name="AUTHOR" content="m.pester@fbi.fh-darmstadt.de"> + <meta name="CREATED" content="20030812;16215500"> + <meta name="CHANGEDBY" content="Manfred Pester"> + <meta name="CHANGED" content="20030812;16281900"> + <meta name="EXPIRATION_TIME" content="365"> +</head> +<body lang="de-DE" + background="../../../internet/labor/miarm/waage/papier.gif"> +<table width="100%" cellpadding="2" cellspacing="2" + style="page-break-before: always;"> + <tbody> + <tr> + <td><span class="sd-abs-pos" + style="position: absolute; width: 374px; top: 609px; left: 694px;"> <img + src="../../../internet/labor/miarm/waage/PIC00005.JPG" name="Grafik2" + width="374" height="299" border="0"></span><span class="sd-abs-pos" + style="position: absolute; top: 1.85cm; left: 2.98cm; width: 374px;"> </span> + <p><a + href="http://www.fbi.fh-darmstadt.de/%7Emani/labor/mihome.htm">Softwareentwicklung +fr </a> <br> + <a href="http://www.fbi.fh-darmstadt.de/%7Emani/labor/mihome.htm">Embedded +Systeme</a></p> + </td> + <td> + <h1 align="center"><u>Saitenoszillator-Waage</u></h1> + </td> + <td> + <p align="right"> + <br> + <br> + </p> + </td> + </tr> + </tbody> +</table> +<br> +<center> +<table border="1" cellpadding="2" cellspacing="3" + style="width: 492px; height: 404px;"> + <col width="62"> <col width="103"> <col width="301"> <tbody> + <tr> + <td colspan="3" width="480"> + <p align="center"><font size="4">Anschlubelegung der Waage</font></p> + </td> + </tr> + <tr> + <td width="62"> + <p>Kontakt</p> + </td> + <td width="103"> + <p>Bezeichnung</p> + </td> + <td width="301"> + <p>Bemerkung</p> + </td> + </tr> + <tr> + <td width="62"> + <p align="center">1</p> + </td> + <td width="103"> + <p>Signal 1</p> + </td> + <td width="301"> + <p>ca. 16 kHz, wird bei Belastung hher <br> +Saite wird gespannt.</p> + </td> + </tr> + <tr> + <td width="62"> + <p align="center">2</p> + </td> + <td width="103"> + <p>Signal GND</p> + </td> + <td width="301"> + <p>nicht mit GND verbinden</p> + </td> + </tr> + <tr> + <td width="62"> + <p align="center">3</p> + </td> + <td width="103"> + <p>Signal GND</p> + </td> + <td width="301"> + <p>nicht mit GND verbinden</p> + </td> + </tr> + <tr> + <td width="62"> + <p align="center">4<span + style="position: absolute; top: 1.85cm; left: 2.98cm; width: 374px;" + class="sd-abs-pos"> </span></p> + </td> + <td width="103"> + <p>Signal 2</p> + </td> + <td width="301"> + <p>ca. 16 kHz, wird bei Belastung kleiner <br> +Saite wird entlastet</p> + </td> + </tr> + <tr> + <td width="62"> + <p align="center">5</p> + </td> + <td width="103"> + <p>+ 22V</p> + </td> + <td width="301"> + <p>Versorgungsspannung</p> + </td> + </tr> + <tr> + <td width="62"> + <p align="center">6</p> + </td> + <td width="103"> + <p>GND</p> + </td> + <td width="301"> + <p>nicht mit Signal GND verbinden<br> + </p> + </td> + </tr> + </tbody> +</table> +<span style="position: absolute; width: 374px; top: 612px; left: 211px;" + class="sd-abs-pos"> <img border="0" height="299" width="374" + name="Grafik1" + src="file:///home/mani/labor/internet/labor/miarm/waage/PIC00002.JPG"></span></center> +<div style="text-align: center;"><br> +<span class="sd-abs-pos" + style="position: absolute; top: 1.85cm; left: 2.98cm; width: 374px;"></span>Bilder +der Waage<br> +</div> +</body> +</html> diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1.pdf Binary files differnew file mode 100644 index 0000000..73b4538 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe1.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe1.c new file mode 100644 index 0000000..9d919c5 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe1.c @@ -0,0 +1,16 @@ +// Lsung zu Termin1 +// Aufgabe 1 +// Namen: Sven Eisenhauer; ____________ +// Matr.: 707173; ____________ +// vom: 18.10.2005 + +int main (void) +{ + int a; + int b; + + a=0x1; + b=0x2; + + return (0); +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe2.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe2.c new file mode 100644 index 0000000..289ef01 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe2.c @@ -0,0 +1,16 @@ +// Lsung zu Termin1 +// Aufgabe 2 +// Namen: Sven Eisenhauer; ____________ +// Matr.: 707173; ____________ +// vom: 18.10.2005 + +int a; +int b; + +int main (void) +{ + a=0x1; + b=0x2; + + return (0); +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe3.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe3.c new file mode 100644 index 0000000..eddf6fa --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe3.c @@ -0,0 +1,22 @@ +// Lsung zu Termin1 +// Aufgabe 3 +// Namen: Sven Eisenhauer; ____________ +// Matr.: 707173; ____________ +// vom: 18.10.2005 + +int a; +int b; + +int main (void) +{ + int x; + int y; + + x=0x1; + y=0x2; + + a=x; + b=y; + + return (0); +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe4.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe4.c new file mode 100644 index 0000000..5b573bf --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe4.c @@ -0,0 +1,25 @@ +// Lsung zu Termin1 +// Aufgabe 4 +// Namen: Sven Eisenhauer; ____________ +// Matr.: 707173; ____________ +// vom: 18.10.2005 + +int a; + +void addition(int m, int n, int sum) +{ + sum=m+n; +} + +int main (void) +{ + int x; + int y; + + x=0x1; + y=0x2; + + addition(x,y,a); + + return (0); +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe5.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe5.c new file mode 100644 index 0000000..06c4437 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe5.c @@ -0,0 +1,25 @@ +// Lsung zu Termin1 +// Aufgabe 5 +// Namen: Sven Eisenhauer; ____________ +// Matr.: 707173; ____________ +// vom: 18.10.2005 + +int a; + +void addition(int *m, int *n, int sum) +{ + sum=m+n; +} + +int main (void) +{ + int x; + int y; + + x=0x1; + y=0x2; + + addition(&x,&y,a); + + return (0); +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/frank_micsys2_praktikum01.zip b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/frank_micsys2_praktikum01.zip Binary files differnew file mode 100644 index 0000000..7cdf593 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/frank_micsys2_praktikum01.zip diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/makefile b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/makefile new file mode 100644 index 0000000..3180fee --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/makefile @@ -0,0 +1,11 @@ +# Quellendatei +FILE = Termin1Aufgabe1 +# Optimierungsstufe +OPTI = 1 + +all: +# bersetzen und binden der Quelldatei + arm-elf-gcc -g -O$(OPTI) $(FILE).c -o $(FILE).elf +# Erzeugen des Assemblercode aus der C-Datei + arm-elf-gcc -S -O$(OPTI) $(FILE).c + diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/Termin2.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/Termin2.pdf Binary files differnew file mode 100644 index 0000000..ca65e31 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/Termin2.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/Termin2Aufgabe1.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/Termin2Aufgabe1.c new file mode 100644 index 0000000..dec24cd --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/Termin2Aufgabe1.c @@ -0,0 +1,12 @@ +// Lsung zu Termin2
+// Aufgabe 1
+// Namen: __________; ___________
+// Matr.: __________; ___________
+// vom : __________
+//
+
+int main(void)
+{
+
+ return 0;
+}
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/Termin2Aufgabe4.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/Termin2Aufgabe4.c new file mode 100644 index 0000000..f2e0832 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/Termin2Aufgabe4.c @@ -0,0 +1,20 @@ +// Lsung zu Termin2
+// Aufgabe 4
+// Namen: __________; ___________
+// Matr.: __________; ___________
+// vom : __________
+//
+
+
+void taste_irq_handler (void) __interrupt__ ((interrupt));
+
+void taste_irq_handler (void)
+{
+
+}
+
+int main(void)
+{
+
+ return 0;
+}
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/makefile1 b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/makefile1 new file mode 100644 index 0000000..4df82d6 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/makefile1 @@ -0,0 +1,22 @@ +FILE = Termin2Aufgabe1
+Opti = 1
+
+all:
+# bersetzen der Quelldatei
+# arm-elf-gcc -g -Ttext 0x2000000 -O$(Opti) $(FILE).c -I ../h
+ arm-elf-gcc -g -e main -Ttext 0x2000000 -O$(Opti) $(FILE).c -o $(FILE).elf -nostdlib
+
+# Erzeugen der Assemblerdatei aus der Quelldatei
+ arm-elf-gcc -S -O$(Opti) $(FILE).c
+
+# Ereugen der Objektdateien
+# arm-elf-gcc -c -g -O$(Opti) ../boot/swi.S -o swi.o
+# arm-elf-gcc -c -g -O$(Opti) ../boot/boot.S -o boot.o
+
+# Binden fr die RAM-Version
+# arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot.o swi.o $(FILE).o -o $(FILE).elf
+
+# Binden fr die FLASH-Version
+# arm-elf-ld -Ttext 0x01000000 -O$(Opti) boot.o swi.o $(FILE).o -o $(FILE).out
+# arm-elf-objcopy -I elf32-littlearm -O binary -x -S -N -g $(FILE).out $(FILE).rom
+
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/Termin2Aufgabe1.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/Termin2Aufgabe1.c new file mode 100644 index 0000000..355bb20 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/Termin2Aufgabe1.c @@ -0,0 +1,21 @@ +#include "defines.h"
+
+int main(void)
+{
+ *PMC_PCER = 0x4000; // Power Enable fr Parallel I/O Controller B
+ *PIOB_PER = 0x100; // Pin 8: Enabled (Initialisiert) (Lmpchen)
+ *PIOB_OER = 0x100; // Pin 8: Pin als Ausgabe verwenden
+ // Lmpchen ist initialisiert und auf Output gesetzt.
+
+ int i;
+
+ while (1)
+ {
+ *PIOB_SODR = 0x100; // Pin 8: Lampe an
+ for (i=0; i<125000; i++); // Pause
+ *PIOB_CODR = 0x100; // Pin 8: Lampe aus
+ for (i=0; i<125000; i++); // Pause
+ }
+ return 0;
+}
+
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/Termin2Aufgabe2.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/Termin2Aufgabe2.c new file mode 100644 index 0000000..000f51a --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/Termin2Aufgabe2.c @@ -0,0 +1,22 @@ +#include "defines.h"
+
+int main(void)
+{
+ *PMC_PCER = 0x4000; // Power Enable fr Parallel I/O Controller B
+ *PIOB_PER = 0x118; // Pin 8: Enabled (Initialisiert) (Lmpchen)
+ // *PIOB_PER = 0x100; *PIOB_PER = 0x8; *PIOB_PER = 0x10
+ *PIOB_OER = 0x100; // Pin 8: Pin als Ausgabe verwenden
+
+ // Schalter werden nicht auf Input geschaltete, da dies Default Zustand ist
+ // Lmpchen ist initialisiert und auf Output gesetzt.
+
+ while (1)
+ {
+ if (!(*PIOB_PDSR & 0X8))
+ *PIOB_SODR = 0x100; // Pin 8: Lampe an
+ if (!(*PIOB_PDSR & 0x10))
+ *PIOB_CODR = 0x100; // Pin 8: Lampe aus
+ }
+ return 0;
+}
+
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/Termin2Aufgabe3.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/Termin2Aufgabe3.c new file mode 100644 index 0000000..21ed738 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/Termin2Aufgabe3.c @@ -0,0 +1,31 @@ +#include "defines.h"
+
+int main(void)
+{
+ *PMC_PCER = 0x4000; // Power Enable fr Parallel I/O Controller B
+ *PIOB_PER = 0x318; // Pin 8,9,3,4: Enabled (Initialisiert) (Lmpchen1,2,Schalter1,2)
+ // *PIOB_PER = 0x100; *PIOB_PER = 0x200; *PIOB_PER = 0x8; *PIOB_PER = 0x10
+ *PIOB_OER = 0x300; // Pin 8,9: Pin als Ausgabe verwenden (Lampe 1,2)
+
+ // Schalter werden nicht auf Input geschaltete, da dies Default Zustand ist
+ // Lmpchen ist initialisiert und auf Output gesetzt.
+
+ int i;
+
+ while (1)
+ {
+ *PIOB_SODR = 0x100; // Pin 8: Lampe 1 an
+ for (i=0; i<125000; i++); // Pause
+ *PIOB_CODR = 0x100; // Pin 8: Lampe 1 aus
+ for (i=0; i<125000; i++); // Pause
+
+ // PDSR wird erst geprft nachdem Lampe 1 aus ist
+
+ if (!(*PIOB_PDSR & 0X8))
+ *PIOB_SODR = 0x200; // Pin 8: Lampe 2 an
+ if (!(*PIOB_PDSR & 0x10))
+ *PIOB_CODR = 0x200; // Pin 8: Lampe 2 aus
+ }
+ return 0;
+}
+
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/defines.h b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/defines.h new file mode 100644 index 0000000..b325848 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/defines.h @@ -0,0 +1,16 @@ +// Power Management Controller (Atmel Docu S. 139)
+#define PMC_PCER ((volatile unsigned int*) 0xFFFF4010) // Peripheral Clock Enable Register
+#define PCER_PIOA 0x2000 // PIOA: PIOA Clock. Enable
+#define PCER_PIOB 0x4000 // PIOB: PIOB Clock. Enable
+#define PMC_PCDR ((volatile unsigned int*) 0xFFFF4014) // Peripheral Clock Disable Register
+
+
+/*****************************************************************************/
+// Parallel I/O Controller B (Atmel Docu S. 59)
+#define PIOB_PER ((volatile unsigned int*) 0xFFFF0000) // Enable Register (Atmel Docu S. 60)
+#define PIOB_PDR ((volatile unsigned int*) 0xFFFF0004) // Disable Register (Atmel Docu S. 60)
+#define PIOB_SODR ((volatile unsigned int*) 0xFFFF0030) // Set Output Data Register (Atmel Docu S. 66)
+#define PIOB_CODR ((volatile unsigned int*) 0xFFFF0034) // Clear Output Data Register (Atmel Docu S. 66)
+#define PIOB_OER ((volatile unsigned int*) 0xFFFF0010) // Output Enable Register (Atmel Docu S. 62)
+#define PIOB_ODR ((volatile unsigned int*) 0xFFFF0014) // Output Disable Register (Atmel Docu S.62)
+#define PIOB_PDSR ((volatile unsigned int*) 0xFFFF003C) // Pin Data Status Register (Atmel Docu S.67)
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2.pdf Binary files differnew file mode 100644 index 0000000..f23c20c --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe1.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe1.c new file mode 100644 index 0000000..c8e6468 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe1.c @@ -0,0 +1,12 @@ +// Lsung zu Termin2 +// Aufgabe 1 +// Namen: __________; ___________ +// Matr.: __________; ___________ +// vom : __________ +// + +int main(void) +{ + + return 0; +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4.c new file mode 100644 index 0000000..66cef14 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4.c @@ -0,0 +1,20 @@ +// Lsung zu Termin2 +// Aufgabe 4 +// Namen: __________; ___________ +// Matr.: __________; ___________ +// vom : __________ +// + + +void taste_irq_handler (void) __interrupt__ ((interrupt)); + +void taste_irq_handler (void) +{ + +} + +int main(void) +{ + + return 0; +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4a.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4a.c new file mode 100644 index 0000000..4bf8235 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4a.c @@ -0,0 +1,58 @@ +// Lsung zu Termin2 +// Aufgabe 4 +// Namen: __________; ___________ +// Matr.: __________; ___________ +// vom : __________ +// +#include "pio.h" +#include "pmc.h" +#include "aic.h" + +StructPMC* myPMC = PMC_BASE; +StructAIC* myAIC = AIC_BASE; +StructPIO* myPIOB = PIOB_BASE; + +void taste_irq_handler (void) __interrupt__ ((interrupt)); + +void taste_irq_handler (void) +{ + // do the things here + + // necessary?? + //myPIOB->PIO_ISR; // Read Interrupt Status Register to enable + // Interrupt again + + // switch LED1 + + myAIC->AIC_EOICR = 0x00000000; // Write to End of Interrupt Command Register + // to signal end of Interrupt Service Routine +} + +int main(void) +{ + myPMC->PMC_PCER = 0x14; // Clock PIO B + + // Initialize PIOB + myPIOB->PIO_PER = KEY1|KEY2|LED1|LED2; // Enable PIO for SW1,SW2,LED1,LED2 + myPIOB->PIO_OER = LED1|LED2; // Set LED1 and LED2 as output + myPIOB->PIO_CODR = 0x000000FF; // Clear Output Data Register + + // Enable Interrupts in CPU + // done by OS + + // Enable Interrupt for PIOB in AIC + //myAIC->AIC_SMR[] = ; // which register? what to put in it? + //myAIC->AIC_SVR[]= taste_irq_handler // Address of Interrupt handling routine... + + myAIC->AIC_IECR = PIOB_ID; // Enable Interrupt for PIOB + + // enable PIOB Interrupt + //myPIOB->PIO_IER = ; // what to put here? + + // loop to infinity + while(1) + { + } + + return 0; +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4a1.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4a1.c new file mode 100644 index 0000000..fb99f59 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4a1.c @@ -0,0 +1,68 @@ +// Lsung zu Termin2
+// Aufgabe 4
+// Namen: __________; ___________
+// Matr.: __________; ___________
+// vom : __________
+//
+#include "../mi2/h/pio.h"
+#include "../mi2/h/pmc.h"
+#include "../mi2/h/aic.h"
+
+StructPMC* myPMC = PMC_BASE;
+StructAIC* myAIC = AIC_BASE;
+StructPIO* myPIOB = PIOB_BASE;
+
+void taste_irq_handler (void) __attribute__ ((interrupt));
+
+void taste_irq_handler (void)
+{
+
+ volatile int keyPressed = myPIOB->PIO_ISR;
+
+ if (!(keyPressed & KEY1))
+ myPIOB->PIO_SODR = LED1;
+ //if (!(myPIOB->PIO_PDSR & KEY2))
+ if (!(keyPressed & KEY2))
+ myPIOB->PIO_CODR = LED1;
+
+ myAIC->AIC_EOICR = 0x01; // write something to register
+ // to signal end of Interrupt Service Routine
+}
+
+int main(void)
+{
+ myAIC->AIC_EOICR = myPIOB->PIO_ISR;
+ // disable all interrupt sources of pio
+ myPIOB->PIO_IDR = 0xFFFFFFFF;
+
+
+ // Initialize PIOB
+ myPIOB->PIO_PER = KEY1|KEY2|LED1; // Enable PIO for SW1,SW2,LED1,LED2
+ //myPIOB->PIO_OER = LED1|LED2; // Set LED1 and LED2 as output
+ myPIOB->PIO_OER = LED1; // Set LED1 and LED2 as output
+ myPIOB->PIO_CODR = LED1; // Clear Output Data Register
+
+
+ // Enable Interrupts in CPU
+ // done by OS
+
+ // disable PIOB Interrupt in AIC
+ myAIC->AIC_IDCR = (1<<PIOB_ID);
+ // Enable Interrupt for PIOB in AIC
+ myAIC->AIC_SMR[PIOB_ID] = AIC_SRCTYPE_EXT_LOW_LEVEL; // which register? what to put in it? 0x1 for low
+ myAIC->AIC_SVR[PIOB_ID] = (volatile unsigned int)&taste_irq_handler; // Address of Interrupt handling routine...
+
+ // enable PIOB Interrupt in AIC
+ myAIC->AIC_IECR = (1<<PIOB_ID); // Enable Interrupt for PIOB
+
+ // enable PIOB Interrupt
+ myPIOB->PIO_IER = KEY1|KEY2; // what to put here?
+
+ myPMC->PMC_PCER = (1<<PIOB_ID); // Clock PIO B
+ // loop to infinity
+ while(1)
+ {
+ }
+
+ return 0;
+}
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4a2.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4a2.c new file mode 100644 index 0000000..86c839e --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4a2.c @@ -0,0 +1,67 @@ +// Lsung zu Termin2
+// Aufgabe 4
+// Namen: __________; ___________
+// Matr.: __________; ___________
+// vom : __________
+//
+#include "../mi2/h/pio.h"
+#include "../mi2/h/pmc.h"
+#include "../mi2/h/aic.h"
+
+StructPMC* myPMC = PMC_BASE;
+StructAIC* myAIC = AIC_BASE;
+StructPIO* myPIOB = PIOB_BASE;
+
+void taste_irq_handler (void) __attribute__ ((interrupt));
+
+void taste_irq_handler (void)
+{
+
+ volatile int keyPressed = myPIOB->PIO_ISR;
+
+ if (!(keyPressed & KEY1))
+ myPIOB->PIO_SODR = 0x100;
+ //if (!(myPIOB->PIO_PDSR & KEY2))
+ if (!(keyPressed & KEY2))
+ myPIOB->PIO_CODR = 0x100;
+
+ myAIC->AIC_EOICR = 0x01;
+ // to signal end of Interrupt Service Routine
+}
+
+int main(void)
+{
+ myAIC->AIC_EOICR = myPIOB->PIO_ISR;
+ myPIOB->PIO_IDR = 0xFFFFFFFF;
+
+
+ // Initialize PIOB
+ myPIOB->PIO_PER = KEY1|KEY2|LED1|LED2; // Enable PIO for SW1,SW2,LED1,LED2
+ //myPIOB->PIO_OER = LED1|LED2; // Set LED1 and LED2 as output
+ myPIOB->PIO_OER = LED1; // Set LED1 and LED2 as output
+ myPIOB->PIO_CODR = 0x000000FF; // Clear Output Data Register
+
+
+ // Enable Interrupts in CPU
+ // done by OS
+
+ // disable PIOB Interrupt in AIC
+ myAIC->AIC_IDCR = (1<<PIOB_ID);
+ // Enable Interrupt for PIOB in AIC
+ myAIC->AIC_SMR[PIOB_ID] = AIC_SRCTYPE_EXT_LOW_LEVEL; // which register? what to put in it? 0x1 for low
+ myAIC->AIC_SVR[PIOB_ID] = (volatile unsigned int)&taste_irq_handler; // Address of Interrupt handling routine...
+
+ // enable PIOB Interrupt in AIC
+ myAIC->AIC_IECR = (1<<PIOB_ID); // Enable Interrupt for PIOB
+
+ // enable PIOB Interrupt
+ myPIOB->PIO_IER = KEY1|KEY2; // what to put here?
+
+ myPMC->PMC_PCER = (1<<PIOB_ID); // Clock PIO B
+ // loop to infinity
+ while(1)
+ {
+ }
+
+ return 0;
+}
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4b.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4b.c new file mode 100644 index 0000000..fd850c7 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4b.c @@ -0,0 +1,37 @@ +#include "init4.h"
+
+void taste_irq_handler (void) __attribute__ ((interrupt));
+
+void taste_irq_handler (void)
+{
+
+}
+
+int main(void)
+{
+ *pmc_PCER = 0x4000; // Enable Peripheral Clock
+
+ *pioB_PER = 0x118; // LED1=0x100; SW1=0x8; SW2=0x10 -> addieren
+
+ *pioB_OER = 0x100; // Enable Output: LED1, WICHTIG: LED1 hier an!
+
+ *aic_SVR = (int)taste_irq_handler;
+ *aic_SMR = 1;
+
+ for ( ; ; )
+ {
+ if (!(*pioB_PDSR & 0x8)) // wenn SW1 dann LED1=ON (! -> low-active)
+ {
+ *pioB_CODR = 0x100; // Clear LED DS1 -> LED = AN
+ *aic_EOICR = 1;
+ }
+
+ if (!(*pioB_PDSR & 0x10)) // wenn SW2 dann LED1=OFF (! -> low-active)
+ {
+ *pioB_SODR = 0x100; // Set LED DS1 -> LED = AUS
+ *aic_EOICR = 1;
+ }
+ }
+
+ return 0;
+}
\ No newline at end of file diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/frank_micsys2_praktikum02.zip b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/frank_micsys2_praktikum02.zip Binary files differnew file mode 100644 index 0000000..3c5845b --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/frank_micsys2_praktikum02.zip diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/init4.h b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/init4.h new file mode 100644 index 0000000..89a81b2 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/init4.h @@ -0,0 +1,64 @@ +#ifndef init4_h
+#define init4_h
+
+
+// fuer AUFGABE 4:
+#define aic_IDCR ((volatile unsigned int*) 0xFFFFF124)
+//Interrupt Disable Command Register
+#define aic_ICCR ((volatile unsigned int*) 0xFFFFF128)
+// Interrupt Clear Command Register
+#define aic_SMR ((volatile unsigned int*) 0xFFFFF038)
+// Source Mode Register !!!nachfragen
+#define aic_SVR ((volatile unsigned int*) 0xFFFFF0B8)
+// Source Vector Register
+#define aic_EOICR ((volatile unsigned int*) 0xFFFFF130)
+// End of Interrupt Command Reg.
+#define aic_IECR ((volatile unsigned int*) 0xFFFFF120)
+// Interrupt Enable Command Register
+
+#define pmc_PCER ((volatile unsigned int*) 0xFFFF4010)
+// Peripheral Clock Enable Reg
+#define pmc_PCSR ((volatile unsigned int*) 0xFFFF4018)
+// Peripheral Clock Status Reg, Reset: 0x0
+
+#define pioB_PER ((volatile unsigned int*) 0xFFFF0000)
+// PIOB Port Enable Reg
+#define pioB_OER ((volatile unsigned int*) 0xFFFF0010)
+// PIOB Output Enable Reg
+#define pioB_SODR ((volatile unsigned int*) 0xFFFF0030)
+// PIOB Set Output Data Reg
+#define pioB_CODR ((volatile unsigned int*) 0xFFFF0034)
+// PIOB Clear Output Data Reg
+#define pioB_PDSR ((volatile unsigned int*) 0xFFFF003C)
+// PIOB PIN Data Status Reg
+
+
+#endif
+
+/*
+#define aic_SMR ((volatile unsigned int*) 0xFFFFF038)
+ // Source Mode Register !!!nachfragen
+#define aic_SVR ((volatile unsigned int*) 0xFFFFF0B8)
+ // Source Vector Register
+*/
+
+//in MAIN->
+//....
+//*aic_SMR = 0x1 //
+/*
+SRCTYPE: Interrupt Source Type
+Program the input to be positive- or negative-edge triggered or positive- or
+negative-level sensitive.
+The active level or edge is not programmable for the internal sources.
+----> hier haben wir den "Level Sensitive: Low-Level Sensitive" 00
+PRIOR: Priority Level
+
+Program the priority level for all sources except source 0 (FIQ).
+The priority level can be between 0 (lowest) and 7 (highest).
+The priority level is not used for the FIQ in the SMR0.
+---> also haben wir die 1
+sprich-> 0x01 -> 0x1;
+*/
+
+//*aic_SVR = (volatile unsigned int) &taste_irq_handler; //im spteren Verlauf der Praktika wird
+//hier eine Interrupt-Routine-FKT kommen, die das weitere Vorgehen veranlast und in "fast" allen SVRs hinein kommt
\ No newline at end of file diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/makefile b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/makefile new file mode 100644 index 0000000..f44a2e7 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/makefile @@ -0,0 +1,51 @@ +FILE = Termin2Aufgabe1
+Opti = 0
+all:
+
+# bersetzen der Quelldatei
+ arm-elf-gcc -c -g -O$(Opti) $(FILE).c -I ../h
+
+# Erzeugen der Assemblerdatei aus der Quelldatei
+ arm-elf-gcc -S -o$(Opti) $(FILE).c -I ../h
+
+# Erzeugen der bentitgen Objektdateien
+ arm-elf-gcc -c -g -O$(Opti) ../boot/swi.S -o swi.o -I ../h
+ arm-elf-gcc -c -g -O$(Opti) ../boot/boot_ice.S -o boot_ice.o -I ../h
+ arm-elf-gcc -c -g -O$(Opti) ../boot/boot_flash.S -o boot_flash.o -I ../h
+# arm-elf-gcc -c -g -O$(Opti) seriell.S -I ../h
+# arm-elf-gcc -c -g -O$(Opti) ser_io.S -I ../h
+
+# Binden fr die RAM-Version
+# arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot.o swi.o $(FILE).o -o $(FILE).elf /usr/gnutools/lib/gcc-lib/arm-elf/3.3.2/libgcc.a
+ arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot_ice.o swi.o $(FILE).o -o $(FILE).elf
+
+# Linkerskripte noch nicht getestet
+# arm-elf-ld -T ldscript.ram boot.o swi.o seriell.o ser_io.o swi.o $(FILE).o -o $(FILE).elf /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a
+
+# Binden fr die FLASH-Version
+# arm-elf-ld -Ttext 0x1000000 boot.o swi.o $(FILE).o -o $(FILE).out /usr/gnutools/lib/gcc-lib/arm-elf/3.3.2/libgcc.a
+ arm-elf-ld -Ttext 0x1000000 boot_flash.o swi.o $(FILE).o -o $(FILE).out
+
+# Linkerskripte noch nicht getestet
+# arm-elf-ld -T ldscript.rom boot.o seriell.o ser_io.o swi.o $(FILE).o -o $(FILE).out /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a
+
+# -I --input-target <bfdname> Assume input file is in format <bfdname>
+# -O --output-target <bfdname> Create an output file in format <bfdname>
+# -S --strip-all Remove all symbol and relocation information
+# -x --discard-all Remove all non-global symbols
+# -N --strip-symbol <name> Do not copy symbol <name>
+# -O --output-target <bfdname> Create an output file in format <bfdname>
+# -g --strip-debug Remove all debugging symbols
+ arm-elf-objcopy -I elf32-littlearm -O binary -x -S -N -g $(FILE).out $(FILE).rom
+# programm.rom nach /tftpboot/downlaod.bin kopieren <cp name.rom /tftpboot/download.bin>
+# Jumper E7 mu auf STD stecken
+# Mit <telnet 141.100.xxx.xxx> mit dem BDI2000 verbinden.
+# mit <erase 0x1100000> flash-Bereich lschen
+# mit <prog 0x1100000 download.bin bin> Programm ins flash schreiben.
+#
+#
+clean:
+ rm *.o
+ rm *.s
+ rm *.elf
+ rm *.rom
\ No newline at end of file diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Aufgabe/Termin3.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Aufgabe/Termin3.pdf Binary files differnew file mode 100644 index 0000000..a4be8fb --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Aufgabe/Termin3.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Aufgabe/Termin3Aufgabe1.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Aufgabe/Termin3Aufgabe1.c new file mode 100644 index 0000000..b222c22 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Aufgabe/Termin3Aufgabe1.c @@ -0,0 +1,12 @@ +// Lsung zu Termin3
+// Aufgabe 1
+// Namen: __________; ___________
+// Matr.: __________; ___________
+// vom : __________
+//
+
+int main(void)
+{
+
+ return 0;
+}
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Aufgabe/makefile1 b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Aufgabe/makefile1 new file mode 100644 index 0000000..d10a7f9 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Aufgabe/makefile1 @@ -0,0 +1,14 @@ +FILE = Termin3Aufgabe1
+Opti = 1
+
+all:
+ arm-elf-gcc -c -g -O$(OPTI) ../boot/swi.S
+ arm-elf-gcc -c -g -O$(OPTI) ../boot/boot.s
+ arm-elf-gcc -g -c -O$(OPTI) $(FILE).c
+ arm-elf-gcc -S -O$(OPTI) $(FILE).c
+ arm-elf-ld -Ttext 0x2000000 swi.o boot.o $(FILE).o -o $(FILE).elf
+
+clean:
+ rm -f *.o
+ rm *.elf
+
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Interface.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Interface.pdf Binary files differnew file mode 100644 index 0000000..00b5d6c --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Interface.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3.pdf Binary files differnew file mode 100644 index 0000000..b34cd69 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe1.bak.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe1.bak.c new file mode 100644 index 0000000..8c19eac --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe1.bak.c @@ -0,0 +1,77 @@ +// Lsung zu Termin3
+// Aufgabe 1
+// von:
+// vom:
+//
+
+#include "../h/pmc.h"
+#include "../h/tc.h"
+#include "../h/pio.h"
+#include "../h/aic.h"
+
+void taste_irq_handler (void) __attribute__ ((interrupt));
+
+// Interruptserviceroutine fr die Tasten SW1 und SW2
+void taste_irq_handler (void)
+{
+ StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B
+ StructAIC* aicbase = AIC_BASE; //__
+
+// ab hier entsprechend der Aufgabestellung ergnzen
+//**************************************************
+
+
+
+ aicbase->AIC_EOICR = piobaseB->PIO_ISR; //__
+}
+
+// Timer3 initialisieren
+void Timer3_init( void )
+{
+ StructTC* timerbase3 = TCB3_BASE; // Basisadressse TC Block 1
+ StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO B
+
+ timerbase3->TC_CCR = TC_CLKDIS; // Disable Clock
+
+ // Initialize the mode of the timer 3
+ timerbase3->TC_CMR =
+ TC_ACPC_CLEAR_OUTPUT | //ACPC : Register C clear TIOA
+ TC_ACPA_SET_OUTPUT | //ACPA : Register A set TIOA
+ TC_WAVE | //WAVE : Waveform mode
+ TC_CPCTRG | //CPCTRG : Register C compare trigger enable
+ TC_CLKS_MCK1024; //TCCLKS : MCKI / 1024
+
+ // Initialize the counter:
+ timerbase3->TC_RA = 300; //__
+ timerbase3->TC_RC = 600; //__
+
+ // Start the timer :
+ timerbase3->TC_CCR = TC_CLKEN ; //__
+ timerbase3->TC_CCR = TC_SWTRG ; //__
+ piobaseA->PIO_PER = (1<<PIOTIOA3) ; //__
+ piobaseA->PIO_OER = (1<<PIOTIOA3) ; //__
+ piobaseA->PIO_CODR = (1<<PIOTIOA3) ; //__
+}
+
+int main(void)
+{
+
+ StructPMC* pmcbase = PMC_BASE; // Basisadresse des PMC
+ StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO A
+ StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B
+
+ pmcbase->PMC_PCER = 0x4000; // Peripheral Clocks einschalten fr PIOB, _____
+
+// ab hier entsprechend der Aufgabestellung ergnzen
+//**************************************************
+
+
+
+
+ while(1)
+ {
+
+ }
+
+ return 0;
+}
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe1.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe1.c new file mode 100644 index 0000000..05c3406 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe1.c @@ -0,0 +1,77 @@ +// Lsung zu Termin3 +// Aufgabe 1 +// von: +// vom: +// + +#include "../h/pmc.h" +#include "../h/tc.h" +#include "../h/pio.h" +#include "../h/aic.h" + +void taste_irq_handler (void) __attribute__ ((interrupt)); + +// Interruptserviceroutine fr die Tasten SW1 und SW2 +void taste_irq_handler (void) +{ + StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B + StructAIC* aicbase = AIC_BASE; //__ + +// ab hier entsprechend der Aufgabestellung ergnzen +// ************************************************* + + + + aicbase->AIC_EOICR = piobaseB->PIO_ISR; //__ +} + +// Timer3 initialisieren +void Timer3_init( void ) +{ + StructTC* timerbase3 = TCB3_BASE; // Basisadressse TC Block 1 + StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO B + + timerbase3->TC_CCR = TC_CLKDIS; // Disable Clock + + // Initialize the mode of the timer 3 + timerbase3->TC_CMR = + TC_ACPC_CLEAR_OUTPUT | //ACPC : Register C clear TIOA + TC_ACPA_SET_OUTPUT | //ACPA : Register A set TIOA + TC_WAVE | //WAVE : Waveform mode + TC_CPCTRG | //CPCTRG : Register C compare trigger enable + TC_CLKS_MCK1024; //TCCLKS : MCKI / 1024 + + // Initialize the counter: + timerbase3->TC_RA = 300; //__ + timerbase3->TC_RC = 600; //__ + + // Start the timer : + timerbase3->TC_CCR = TC_CLKEN ; //__ + timerbase3->TC_CCR = TC_SWTRG ; //__ + piobaseA->PIO_PER = (1<<PIOTIOA3) ; //__ + piobaseA->PIO_OER = (1<<PIOTIOA3) ; //__ + piobaseA->PIO_CODR = (1<<PIOTIOA3) ; //__ +} + +int main(void) +{ + + StructPMC* pmcbase = PMC_BASE; // Basisadresse des PMC + StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO A + StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B + + pmcbase->PMC_PCER = 0x4000; // Peripheral Clocks einschalten fr PIOB, _____ + +// ab hier entsprechend der Aufgabestellung ergnzen +//************************************************** + + + + + while(1) + { + + } + + return 0; +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe1.out b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe1.out Binary files differnew file mode 100644 index 0000000..e32599e --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe1.out diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe2.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe2.c new file mode 100644 index 0000000..9fe2783 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe2.c @@ -0,0 +1,99 @@ +// Lsung zu Termin3
+// Aufgabe 1
+
+// vom: 04.11.2003
+//
+
+#include "../h/pmc.h"
+#include "../h/tc.h"
+#include "../h/pio.h"
+#include "../h/aic.h"
+
+void taste_irq_handler (void) __attribute__ ((interrupt));
+
+// Interruptserviceroutine fr die Tasten SW1 und SW2
+void taste_irq_handler (void)
+{
+ StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B
+ StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO A
+ StructAIC* aicbase = AIC_BASE; // Basisadresse Advanced Interrupt Controller
+
+// ab hier entsprechend der Aufgabestellung ergnzen
+//**************************************************
+
+ if (!(piobaseB->PIO_PDSR & KEY1)) // falls Schalter 1 gedrckt
+ piobaseA->PIO_PDR = (1<<PIOTIOA3); // Timer herrscht ber Bit (Tacktsignal)
+ if (!(piobaseB->PIO_PDSR & KEY2)) // falls Schalter 2 gedrckt
+ piobaseA->PIO_PER = (1<<PIOTIOA3); // PIOA herrscht ber (0 Signal)
+
+ aicbase->AIC_EOICR = piobaseB->PIO_ISR; // AIC End of Interrupt Command Register = PIOB Interrupt Status Register
+}
+
+// Timer3 initialisieren
+void Timer3_init( void )
+{
+ StructTC* timerbase3 = TCB3_BASE; // Basisadressse TC Block 1
+ StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO B
+
+ timerbase3->TC_CCR = TC_CLKDIS; // Disable Clock
+
+ // Initialize the mode of the timer 3
+ timerbase3->TC_CMR =
+ TC_ACPC_CLEAR_OUTPUT | //ACPC : Register C clear TIOA
+ TC_ACPA_SET_OUTPUT | //ACPA : Register A set TIOA
+ TC_WAVE | //WAVE : Waveform mode
+ TC_CPCTRG | //CPCTRG : Register C compare trigger enable
+ TC_CLKS_MCK1024; //TCCLKS : MCKI / 1024
+
+ // Initialize the counter:
+ timerbase3->TC_RA = 2440; // Wert 300 in Register RA: wenn Wert erreicht Steigende Flanke
+ timerbase3->TC_RC = 4880; // Wert 600 in Register RC: wenn Wert erreicht Fallende Flanke
+
+ // Start the timer :
+ timerbase3->TC_CCR = TC_CLKEN ; // Timer Clock enabled
+ timerbase3->TC_CCR = TC_SWTRG ; // Reset Counter
+ // Vermeiden, da dauerhaftes High Signal (PIO herrscht ber das BIT)
+ piobaseA->PIO_PER = (1<<PIOTIOA3) ; // PIN der PIO zuweisen
+ piobaseA->PIO_OER = (1<<PIOTIOA3) ; // wird auf Output gesetzt
+ piobaseA->PIO_CODR = (1<<PIOTIOA3) ; // Clear Output (low Signal)
+}
+
+int main(void)
+{
+
+ StructPMC* pmcbase = PMC_BASE; // Basisadresse des PMC
+ StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO A
+ StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B
+
+ // pmcbase->PMC_PCER = 0x4000; // Peripheral Clocks einschalten fr PIOB,
+
+// ab hier entsprechend der Aufgabestellung ergnzen
+//**************************************************
+
+ pmcbase->PMC_PCER = 0x6200; // Timer (0x200), PIOA (0x2000), PIOB (0x4000) einschalten
+ Timer3_init();
+ piobaseB->PIO_PER = 0x38; // Schalter 1-3 enabeled
+
+
+ // Interrupt Initialisierung fr PIOB (0x4000)
+ piobaseB->PIO_IER = 0x18; // Schalter 1+2 lsen Interrupts aus
+ StructAIC* aicbase = AIC_BASE; // Basisadresse Advanced Interrupt Controller
+ aicbase->AIC_IDCR = 0x4000; // Interrupt disabled
+ aicbase->AIC_ICCR = 0x4000; // Interrupt clear
+ aicbase->AIC_SMR[14] = 0x07; // An Stelle 14 Level Sensitive / Hchste Prioritt
+ aicbase->AIC_SVR[14] = (unsigned int)taste_irq_handler; // Adresse der Interrupt Service Routine in Vektor-Tabelle
+ aicbase->AIC_IECR = 0x4000;
+
+
+
+ while(piobaseB->PIO_PDSR & KEY3)
+ {
+
+ }
+
+ // Vermeiden, da dauerhaftes High Signal (PIO herrscht ber das BIT)
+ piobaseA->PIO_PER = (1<<PIOTIOA3) ; // PIN der PIO zuweisen
+ aicbase->AIC_IDCR = 0x4000; // Interrupt Disable
+
+ return 0;
+}
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe3.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe3.c new file mode 100644 index 0000000..48a7955 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe3.c @@ -0,0 +1,109 @@ +// Lsung zu Termin3
+// Aufgabe 3
+
+// vom: 07.12.2005
+// Andreas Spirka, Sven Eisenhauer
+
+#include "../h/pmc.h"
+#include "../h/tc.h"
+#include "../h/pio.h"
+#include "../h/aic.h"
+
+void taste_irq_handler (void) __attribute__ ((interrupt));
+
+// Interruptserviceroutine fr die Tasten SW1 und SW2
+void taste_irq_handler (void)
+{
+ StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B
+ StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO A
+ StructAIC* aicbase = AIC_BASE; // Basisadresse Advanced Interrupt Controller
+
+// ab hier entsprechend der Aufgabestellung ergnzen
+//**************************************************
+
+ if (!(piobaseB->PIO_PDSR & KEY1)) // falls Schalter 1 gedrckt
+ piobaseA->PIO_PDR = (1<<PIOTIOA3); // Timer herrscht ber Bit (Tacktsignal)
+ if (!(piobaseB->PIO_PDSR & KEY2)) // falls Schalter 2 gedrckt
+ piobaseA->PIO_PER = (1<<PIOTIOA3); // PIOA herrscht ber (0 Signal)
+
+ aicbase->AIC_EOICR = piobaseB->PIO_ISR; // AIC End of Interrupt Command Register = PIOB Interrupt Status Register
+}
+
+// Timer3 initialisieren
+void Timer3_init( void )
+{
+ StructTC* timerbase3 = TCB3_BASE; // Basisadressse TC Block 1
+ StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO B
+
+ timerbase3->TC_CCR = TC_CLKDIS; // Disable Clock
+
+ // Initialize the mode of the timer 3
+ timerbase3->TC_CMR =
+ TC_ACPC_CLEAR_OUTPUT | //ACPC : Register C clear TIOA
+ TC_ACPA_SET_OUTPUT | //ACPA : Register A set TIOA
+ TC_WAVE | //WAVE : Waveform mode
+ TC_CPCTRG | //CPCTRG : Register C compare trigger enable
+ TC_CLKS_MCK1024; //TCCLKS : MCKI / 1024
+
+ // Initialize the counter:
+ timerbase3->TC_RA = 2440; // Wert 300 in Register RA: wenn Wert erreicht Steigende Flanke
+ timerbase3->TC_RC = 4880; // Wert 600 in Register RC: wenn Wert erreicht Fallende Flanke
+
+ // Start the timer :
+ timerbase3->TC_CCR = TC_CLKEN ; // Timer Clock enabled
+ timerbase3->TC_CCR = TC_SWTRG ; // Reset Counter
+ // Vermeiden, da dauerhaftes High Signal (PIO herrscht ber das BIT)
+ piobaseA->PIO_PER = (1<<PIOTIOA3) ; // PIN der PIO zuweisen
+ piobaseA->PIO_OER = (1<<PIOTIOA3) ; // wird auf Output gesetzt
+ piobaseA->PIO_CODR = (1<<PIOTIOA3) ; // Clear Output (low Signal)
+}
+
+void piob_init(void)
+{
+ StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B
+ // disable all interrupt sources of pio
+ piobaseB->PIO_IDR = 0xFFFFFFFF;
+ piobaseB->PIO_PER = KEY1|KEY2|KEY3; // Schalter 1-3 enabeled
+ // Interrupt Initialisierung fr PIOB (0x4000)
+ piobaseB->PIO_IER = KEY1|KEY2; // Schalter 1+2 lsen Interrupts aus
+}
+
+int main(void)
+{
+
+ StructPMC* pmcbase = PMC_BASE; // Basisadresse des PMC
+ StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO A
+ StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B
+
+
+// ab hier entsprechend der Aufgabestellung ergnzen
+//**************************************************
+
+ // Timer (0x200), PIOA (0x2000), PIOB (0x4000) einschalten
+ pmcbase->PMC_PCER = (1<<PIOA_ID)|(1<<PIOB_ID)|(1<<TC3_ID);
+ Timer3_init();
+ piob_init();
+
+ StructAIC* aicbase = AIC_BASE; // Basisadresse Advanced Interrupt Controller
+ aicbase->AIC_IDCR = (1<<PIOB_ID); // Interrupt disabled
+ aicbase->AIC_ICCR = (1<<PIOB_ID); // Interrupt clear
+ aicbase->AIC_SMR[PIOB_ID] = AIC_SRCTYPE_EXT_LOW_LEVEL|AIC_PRIOR; // An Stelle 14 Level Sensitive / Hchste Prioritt
+ aicbase->AIC_SVR[PIOB_ID] = (unsigned int)taste_irq_handler; // Adresse der Interrupt Service Routine in Vektor-Tabelle
+ aicbase->AIC_IECR = (1<<PIOB_ID); // enable PIOB Interrupt in AIC
+
+ while(piobaseB->PIO_PDSR & KEY3)
+ {
+
+ }
+ // Vermeiden, da dauerhaftes High Signal (PIO herrscht ber das BIT)
+ piobaseA->PIO_PER = (1<<PIOTIOA3) ; // PIN der PIO zuweisen
+ piobaseA->PIO_OER = (1<<PIOTIOA3) ; // wird auf Output gesetzt
+ piobaseA->PIO_CODR = (1<<PIOTIOA3) ; // Clear Output (low Signal)
+ // disable piob command register in AIC
+ aicbase->AIC_IDCR = (1<<PIOB_ID);
+ // disable all interrupt sources of pio
+ piobaseB->PIO_IDR = 0xFFFFFFFF;
+ // Timer (0x200), PIOA (0x2000), PIOB (0x4000) ausschalten
+ pmcbase->PMC_PCDR = (1<<PIOA_ID)|(1<<PIOB_ID)|(1<<TC3_ID);
+ return 0;
+}
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/frank_micsys2_praktikum03.zip b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/frank_micsys2_praktikum03.zip Binary files differnew file mode 100644 index 0000000..13733fb --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/frank_micsys2_praktikum03.zip diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/makefile b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/makefile new file mode 100644 index 0000000..80f70dd --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/makefile @@ -0,0 +1,51 @@ +FILE = Termin3Aufgabe1
+Opti = 0
+all:
+
+# bersetzen der Quelldatei
+ arm-elf-gcc -c -g -O$(Opti) $(FILE).c -I ../h
+
+# Erzeugen der Assemblerdatei aus der Quelldatei
+ arm-elf-gcc -S -o$(Opti) $(FILE).c -I ../h
+
+# Erzeugen der bentitgen Objektdateien
+ arm-elf-gcc -c -g -O$(Opti) ../boot/swi.S -o swi.o -I ../h
+ arm-elf-gcc -c -g -O$(Opti) ../boot/boot_ice.S -o boot_ice.o -I ../h
+ arm-elf-gcc -c -g -O$(Opti) ../boot/boot_flash.S -o boot_flash.o -I ../h
+# arm-elf-gcc -c -g -O$(Opti) seriell.S -I ../h
+# arm-elf-gcc -c -g -O$(Opti) ser_io.S -I ../h
+
+# Binden fr die RAM-Version
+# arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot.o swi.o $(FILE).o -o $(FILE).elf /usr/gnutools/lib/gcc-lib/arm-elf/3.3.2/libgcc.a
+ arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot_ice.o swi.o $(FILE).o -o $(FILE).elf
+
+# Linkerskripte noch nicht getestet
+# arm-elf-ld -T ldscript.ram boot.o swi.o seriell.o ser_io.o swi.o $(FILE).o -o $(FILE).elf /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a
+
+# Binden fr die FLASH-Version
+# arm-elf-ld -Ttext 0x1000000 boot.o swi.o $(FILE).o -o $(FILE).out /usr/gnutools/lib/gcc-lib/arm-elf/3.3.2/libgcc.a
+ arm-elf-ld -Ttext 0x1000000 boot_flash.o swi.o $(FILE).o -o $(FILE).out
+
+# Linkerskripte noch nicht getestet
+# arm-elf-ld -T ldscript.rom boot.o seriell.o ser_io.o swi.o $(FILE).o -o $(FILE).out /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a
+
+# -I --input-target <bfdname> Assume input file is in format <bfdname>
+# -O --output-target <bfdname> Create an output file in format <bfdname>
+# -S --strip-all Remove all symbol and relocation information
+# -x --discard-all Remove all non-global symbols
+# -N --strip-symbol <name> Do not copy symbol <name>
+# -O --output-target <bfdname> Create an output file in format <bfdname>
+# -g --strip-debug Remove all debugging symbols
+ arm-elf-objcopy -I elf32-littlearm -O binary -x -S -N -g $(FILE).out $(FILE).rom
+# programm.rom nach /tftpboot/downlaod.bin kopieren <cp name.rom /tftpboot/download.bin>
+# Jumper E7 mu auf STD stecken
+# Mit <telnet 141.100.xxx.xxx> mit dem BDI2000 verbinden.
+# mit <erase 0x1000000> flash-Bereich lschen
+# mit <prog 0x1000000 download.bin bin> Programm ins flash schreiben.
+#
+#
+clean:
+ rm *.o
+ rm *.s
+ rm *.elf
+ rm *.rom
\ No newline at end of file diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/makefile1 b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/makefile1 new file mode 100644 index 0000000..6308804 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/makefile1 @@ -0,0 +1,14 @@ +FILE = Termin3Aufgabe3
+Opti = 1
+
+all:
+ arm-elf-gcc -c -g -O1 ../boot/swi.S
+ arm-elf-gcc -c -g -O1 ../boot/boot.s
+ arm-elf-gcc -c -g -O1 $(FILE).c
+ arm-elf-gcc -S $(FILE).c
+ arm-elf-ld -Ttext 0x2000000 swi.o boot.o $(FILE).o -o $(FILE).elf
+
+clean:
+ rm -f *.o
+ rm *.elf
+
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.1 b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.1 new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.1 diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.cl b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.cl Binary files differnew file mode 100644 index 0000000..04a5f36 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.cl diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.f b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.f Binary files differnew file mode 100644 index 0000000..d1a2701 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.f diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.fil b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.fil Binary files differnew file mode 100644 index 0000000..8f1e98e --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.fil diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.fu b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.fu Binary files differnew file mode 100644 index 0000000..34796cc --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.fu diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.icl b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.icl Binary files differnew file mode 100644 index 0000000..cf812bc --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.icl diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.iu b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.iu Binary files differnew file mode 100644 index 0000000..2de75ea --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.iu diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.iv b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.iv Binary files differnew file mode 100644 index 0000000..b754796 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.iv diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.ma b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.ma Binary files differnew file mode 100644 index 0000000..bb2cf2c --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.ma diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/tmp_0mEBrK b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/tmp_0mEBrK new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/tmp_0mEBrK @@ -0,0 +1 @@ + diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Interface.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Interface.pdf Binary files differnew file mode 100644 index 0000000..00b5d6c --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Interface.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Termin4.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Termin4.pdf Binary files differnew file mode 100644 index 0000000..5c9def3 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Termin4.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Termin4Aufgabe1.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Termin4Aufgabe1.c new file mode 100644 index 0000000..67b220d --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Termin4Aufgabe1.c @@ -0,0 +1,80 @@ +// Lsung zur Aufgabe Termin4 +// Aufgabe 1 +//**************************** +// Zeiger auf Peripherie +// Messen der Periodendauer einer angelegten Frequenz +// +// von: Manfred Pester +// vom: 06. August 2003 + +#include "../h/pio.h" +#include "../h/tc.h" +#include "../h/pmc.h" + +// fr die Initialisierung des Zhler TC4 + +#define TC4_INIT TC_CLKS_MCK2 | TC_LDBSTOP | TC_CAPT | TC_LDRA_RISING_EDGE | TC_LDRB_RISING_EDGE + + +int main(void) +{ + volatile int captureRA1; + volatile int captureRB1; + volatile int capturediff1; + volatile float Periodendauer1; + volatile int captureRA2; + volatile int captureRB2; + volatile int capturediff2; + volatile float Periodendauer2; + volatile int c1=18030/1.09; + volatile int c2=40; + volatile float masse; + + StructPMC* pmcbase = PMC_BASE; + StructPIO* piobaseA = PIOA_BASE; + StructPIO* piobaseB = PIOB_BASE; + StructTC* tcbase4 = TCB4_BASE; + StructTC* tcbase5 = TCB5_BASE; + + pmcbase->PMC_PCER = 0x06f80; // Clock PIOA, PIOB, Timer5, Timer4, Timer1 einschalten + +// Periodendauer der Waagensignale messen +// Signal aud TIOA4 ca. 16kHz entspricht ca. einer Periodendauer von 62,5us +// durch den Teiler von 32 ergeben sich ca. 2ms +// Zhler mit positiver Flanke starten + + //piobaseA->PIO_PDR = 0x090; + piobaseA->PIO_PDR = (1<<PIOTIOA4)|(1<<PIOTIOA5); + tcbase4->TC_CCR = TC_CLKDIS; + tcbase4->TC_CMR = TC4_INIT; + tcbase4->TC_CCR = TC_CLKEN; + tcbase4->TC_CCR = TC_SWTRG; + + tcbase5->TC_CCR = TC_CLKDIS; + tcbase5->TC_CMR = TC4_INIT; + tcbase5->TC_CCR = TC_CLKEN; + tcbase5->TC_CCR = TC_SWTRG; + + piobaseB-> PIO_PER = KEY3; + + while(piobaseB->PIO_PDSR & KEY3) + { + tcbase4->TC_CCR = TC_SWTRG; + tcbase5->TC_CCR = TC_SWTRG; + while (!( tcbase4->TC_SR & TC_LDBSTOP)); // Capture Register B wurde geladen Messung abgeschlossen + captureRA1 = tcbase4->TC_RA; // + captureRB1 = tcbase4->TC_RB; + capturediff1 = abs(captureRB1) - abs(captureRA1); + Periodendauer1 = abs(capturediff1) / 12.5; // Zeit in us + while (!( tcbase5->TC_SR & TC_LDBSTOP)); // Capture Register B wurde geladen Messung abgeschlossen + captureRA2 = tcbase5->TC_RA; // + captureRB2 = tcbase5->TC_RB; + capturediff2 = abs(captureRB2) - abs(captureRA2); + Periodendauer2 = abs(capturediff2) / 12.5; // Zeit in us + + masse = c1 * ((Periodendauer1 / Periodendauer2) -1) -c2; + + } + + return 0; +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Termin4Aufgabe4.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Termin4Aufgabe4.c new file mode 100644 index 0000000..7871155 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Termin4Aufgabe4.c @@ -0,0 +1,39 @@ +// Lsung zur Aufgabe Termin4 +// Aufgabe 4 +//**************************** +// Zeiger auf Peripherie +// Messen der aufgelegten Masse +// +// von: Manfred Pester +// vom: 06. August 2003 + +#include "../h/pio.h" +#include "../h/tc.h" +#include "../h/pmc.h" + + +void PIO_Init(void) +{ + +} + +void Timer_Init(void) +{ + +} + +int main(void) +{ + + volatile int Masse; + + PIO_Init(); + Timer_Init(); + + while(!(piobaseA->PIO_ODSR & KEY3)) + { + Masse = MessungderMasse(); + } + + return 0; +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/frank_micsys2_praktikum04.zip b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/frank_micsys2_praktikum04.zip Binary files differnew file mode 100644 index 0000000..334a402 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/frank_micsys2_praktikum04.zip diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/makefile b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/makefile new file mode 100644 index 0000000..596ef49 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/makefile @@ -0,0 +1,51 @@ +FILE = Termin4Aufgabe1
+Opti = 0
+all:
+
+# bersetzen der Quelldatei
+ arm-elf-gcc -c -g -O$(Opti) $(FILE).c -I ../h
+
+# Erzeugen der Assemblerdatei aus der Quelldatei
+ arm-elf-gcc -S -o$(Opti) $(FILE).c -I ../h
+
+# Erzeugen der bentitgen Objektdateien
+ arm-elf-gcc -c -g -O$(Opti) ../boot/swi.S -o swi.o -I ../h
+ arm-elf-gcc -c -g -O$(Opti) ../boot/boot_ice.S -o boot_ice.o -I ../h
+ arm-elf-gcc -c -g -O$(Opti) ../boot/boot_flash.S -o boot_flash.o -I ../h
+# arm-elf-gcc -c -g -O$(Opti) seriell.S -I ../h
+# arm-elf-gcc -c -g -O$(Opti) ser_io.S -I ../h
+
+# Binden fr die RAM-Version
+# arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot_ice.o swi.o $(FILE).o -o $(FILE).elf /gnutools/lib/gcc-lib/arm-elf/3.3.2/libgcc.a
+ arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot_ice.o swi.o $(FILE).o -o $(FILE).elf
+
+# Linkerskripte noch nicht getestet
+# arm-elf-ld -T ldscript.ram boot.o swi.o seriell.o ser_io.o swi.o $(FILE).o -o $(FILE).elf /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a
+
+# Binden fr die FLASH-Version
+# arm-elf-ld -Ttext 0x1000000 boot_flash.o swi.o $(FILE).o -o $(FILE).out /gnutools/lib/gcc-lib/arm-elf/3.3.2/libgcc.a
+ arm-elf-ld -Ttext 0x1000000 boot_flash.o swi.o $(FILE).o -o $(FILE).out
+
+# Linkerskripte noch nicht getestet
+# arm-elf-ld -T ldscript.rom boot.o seriell.o ser_io.o swi.o $(FILE).o -o $(FILE).out /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a
+
+# -I --input-target <bfdname> Assume input file is in format <bfdname>
+# -O --output-target <bfdname> Create an output file in format <bfdname>
+# -S --strip-all Remove all symbol and relocation information
+# -x --discard-all Remove all non-global symbols
+# -N --strip-symbol <name> Do not copy symbol <name>
+# -O --output-target <bfdname> Create an output file in format <bfdname>
+# -g --strip-debug Remove all debugging symbols
+ arm-elf-objcopy -I elf32-littlearm -O binary -x -S -N -g $(FILE).out $(FILE).rom
+# programm.rom nach /tftpboot/downlaod.bin kopieren <cp name.rom /tftpboot/download.bin>
+# Jumper E7 mu auf STD stecken
+# Mit <telnet 141.100.xxx.xxx> mit dem BDI2000 verbinden.
+# mit <erase 0x1100000> flash-Bereich lschen
+# mit <prog 0x1100000 download.bin bin> Programm ins flash schreiben.
+#
+#
+clean:
+ rm *.o
+ rm *.s
+ rm *.elf
+ rm *.rom
\ No newline at end of file diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/makefile1 b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/makefile1 new file mode 100644 index 0000000..dbc718e --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/makefile1 @@ -0,0 +1,12 @@ +FILE = Termin4Aufgabe1
+Opti = 1
+all:
+# bersetzen der Quelldatei
+ arm-elf-gcc -c -g -O$(Opti) $(FILE).c -I ../h
+# Erzeugen der Assemblerdatei aus der Quelldatei
+ arm-elf-gcc -S -o$(Opti) $(FILE).c
+ arm-elf-gcc -c -g -O$(Opti) ../boot/swi.S -o swi.o
+ arm-elf-gcc -c -g -O$(Opti) ../boot/boot.S -o boot.o
+# Binden fr die RAM-Version
+ arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot.o swi.o $(FILE).o -o $(FILE).elf /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a
+
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/makefile4 b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/makefile4 new file mode 100644 index 0000000..b878e6d --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/makefile4 @@ -0,0 +1,15 @@ +FILE = Termin4Aufgabe4
+Opti = 1
+all:
+# bersetzen der Quelldatei
+ arm-elf-gcc -c -g -O$(Opti) $(FILE).c -I ../h
+# Erzeugen der Assemblerdatei aus der Quelldatei
+ arm-elf-gcc -S -o$(Opti) $(FILE).c
+ arm-elf-gcc -c -g -O$(Opti) ../boot/swi.S -o swi.o
+ arm-elf-gcc -c -g -O$(Opti) ../boot/boot.S -o boot.o
+# Binden fr die RAM-Version
+ arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot.o swi.o $(FILE).o -o $(FILE).elf /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a
+# Binden fr die FLASH-Version
+ arm-elf-ld -Ttext 0x01000000 -O$(Opti) boot.o swi.o $(FILE).o -o $(FILE).out /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a
+ arm-elf-objcopy -I elf32-littlearm -O binary -x -S -N -g $(FILE).out $(FILE).rom
+
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/Termin5.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/Termin5.pdf Binary files differnew file mode 100644 index 0000000..c054ab6 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/Termin5.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/Termin5Aufgabe1.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/Termin5Aufgabe1.c new file mode 100644 index 0000000..1c545be --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/Termin5Aufgabe1.c @@ -0,0 +1,22 @@ +// LProgrammrahmen zur Aufgabe Termin5 +// Aufgabe 1 +//************************************ +// +// von: Manfred Pester +// vom: 06. August 2003 +// letzte nderung: 30. November 2004 +// von: Manfred Pester + +int main(void) +{ + + inits(); +// CR und LF auf das Terminal ausgeben + putchar (0xd); + putchar (0xa); + +// String ausgeben + puts("Hallo! \n"); + + return 0; +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/Termin5Aufgabe3.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/Termin5Aufgabe3.c new file mode 100644 index 0000000..94fb6eb --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/Termin5Aufgabe3.c @@ -0,0 +1,44 @@ +// Programmrahmen zur Aufgabe3 vom Termin5 WS2004 +// Aufgabe 3 +//*********************************************** +// +// von: Manfred Pester +// vom: 06. August 2003 +// letzte nderung: 30. November 2004 +// von: Manfred Pester + +void Int2String(int Zahl) +{ + int a,i=9; + char string[11]; + string[10]='\0'; + + while (Zahl != 0) + { + a = Zahl % 10; + string[i] = a + '0'; // in Char umrechnen + Zahl = Zahl / 10; + i--; + } + puts(&string[i+1]); +} + + +int main(void) +{ + int Zahl = 12345; + + inits(); + +// CR und LF auf das Terminal ausgeben + putchar (0xd); + putchar (0xa); + +// String ausgeben + puts("Hallo! \n"); + + Int2String(Zahl); + + + return 0; +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/boot.S b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/boot.S new file mode 100644 index 0000000..c7c8d83 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/boot.S @@ -0,0 +1,405 @@ +@----------------------------------------------------------------------------- +@- File source : boot.S +@- Object : Bootfile fuer Praktikum +@- +@- 1.0 17/09/02 GR : Creation +@- letzte nderung : 11/11/02 +@------------------------------------------------------------------------------ + +#include "aic.inc" +#include "ebi.inc" + +@------------------------------------------------------------------------------ +@- Area Definition +@----------------- +@- Must be defined as function to put first in the code as it must be mapped +@- at SRAM. +@------------------------------------------------------------------------------ + + .text + + + .global _start +@------------------------------------------------------------------------------ +@- Define the entry point +@------------------------ +_start: + +@------------------------------------------------------------------------------ +@- Exception vectors +@------------------------------------------------------------------------------ + +Reset: B InitReset @ reset +undefvec: B undefvec @ Undefined Instruction +swivec: B swivec @ Software Interrupt +pabtvec: B pabtvec @ Prefetch Abort +dabtvec: B dabtvec @ Data Abort +rsvdvec: B rsvdvec @ reserved +irqvec: B irqvec @ reserved +fiqvec: B fiqvec @ reserved + +@------------------------------------------------------------------------------ +@- Exception vectors ( after cstartup execution ) +@------------------------------------ +@- These vectors are read at RAM address after the remap command is performed in +@- the EBI. As they will be relocated at address 0x0 to be effective, a +@- relative addressing is forbidden. The only possibility to get an absolute +@- addressing for an ARM vector is to read a PC relative value at a defined +@- offset. It is easy to reserve the locations 0x20 to 0x3C (the 8 next +@- vectors) for storing the absolute exception handler address. +@- The AIC vectoring access vectors are saved in the interrupt and fast +@- interrupt ARM vectors. So, only 5 offsets are required ( reserved vector +@- offset is never used). +@- The provisory handler addresses are defined on infinite loop and can be +@- modified at any time. +@- Note also that the reset is only accessible by a jump from the application +@- to 0. It is an actual software reset. +@- As the 13 first location are used by the vectors, the read/write link +@- address must be defined from 0x34 if internal data mapping is required. +@- (use for that the option -rw- base=0x34 +@------------------------------------------------------------------------------ + +VectorTable: + ldr pc, [pc, #0x18] @ SoftReset + ldr pc, [pc, #0x18] @ UndefHandler + ldr pc, [pc, #0x18] @ SWIHandler + ldr pc, [pc, #0x18] @ PrefetchAbortHandler + ldr pc, [pc, #0x18] @ DataAbortHandler + nop @ Reserved + ldr pc, [pc,#-0xF20] @ IRQ : read the AIC + ldr pc, [pc,#-0xF20] @ FIQ : read the AIC + +@- There are only 5 offsets as the vectoring is used. + .word _SoftReset + .word _UndefHandler + .word SWIHandler + .word _PrefetchAbortHandler + .word _DataAbortHandler + +@- Vectoring Execution function run at absolut addresss +_SoftReset: b _SoftReset +_UndefHandler: b _UndefHandler +_SWIHandler: b _SWIHandler +_PrefetchAbortHandler: b _PrefetchAbortHandler +_DataAbortHandler: b _DataAbortHandler + + + +InitTableEBI: + .word EBI_CSR_0 + .word EBI_CSR_1 + .word EBI_CSR_2 + .word EBI_CSR_3 + .word EBI_CSR_4 + .word EBI_CSR_5 + .word EBI_CSR_6 + .word EBI_CSR_7 + .word 0x00000001 @ REMAP command + .word 0x00000006 @ 6 memory regions, standard read +PtEBIBase: + .word EBI_BASE @ EBI Base Address + +@------------------------------------------------------------------------------ +@- The reset handler before Remap +@-------------------------------- +@- From here, the code is executed from SRAM address +@------------------------------------------------------------------------------ +InitReset: + +@------------------------------------------------------------------------------ +@- Speed up the Boot sequence +@---------------------------- +@- After reset, the number os wait states on chip select 0 is 8. All AT91 +@- Evaluation Boards fits fast flash memories, so that the number of wait +@- states can be optimized to fast up the boot sequence. +@- ICE note :For ICE debug no need to set the EBI value these values already set +@- by the boot function. +@------------------------------------------------------------------------------ +@- Load System EBI Base address and CSR0 Init Value + ldr r0, PtEBIBase + ldr r1, InitTableEBI @ values (relative) + +@- Speed up code execution by disabling wait state on Chip Select 0 + str r1, [r0] + +@------------------------------------------------------------------------------ +@- low level init +@---------------- +@ Call __low_level_init to perform initialization before initializing +@ AIC and calling main. +@---------------------------------------------------------------------- + +@ bl __low_level_init + + +@------------------------------------------------------------------------------ +@- Reset the Interrupt Controller +@-------------------------------- +@- Normally, the code is executed only if a reset has been actually performed. +@- So, the AIC initialization resumes at setting up the default vectors. +@------------------------------------------------------------------------------ +@- Load the AIC Base Address and the default handler addresses + + adr r0, AicData @ @ where to read values (relative) + + ldmia r0, {r1-r4} + +@- Setup the Spurious Vector + str r4, [r1, #AIC_SPU] @ r4 = spurious handler + + +@ - ICE note : For ICE debug +@ - Perform 8 End Of Interrupt Command to make sure AIC will not lock out nIRQ + mov r0, #8 +LoopAic0: + str r1, [r1, #AIC_EOICR] @ any value written + subs r0, r0, #1 + bhi LoopAic0 + +@- Reset Interrupts + mov r0, #0 + sub r0, r0, #1 @ all bits set + str r0, [r1, #AIC_IDCR] + str r0, [r1, #AIC_ICCR] + +@- Set up the default interrupt handler vectors + str r2, [r1, #AIC_SVR] @ SVR[0] for FIQ + add r1, r1, #AIC_SVR + mov r0, #31 @ counter +LoopAic1: + str r3, [r1, r0, LSL #2] @ SVRs for IRQs + subs r0, r0, #1 @ do not save FIQ + bhi LoopAic1 + + b EndInitAic + +@- Default Interrupt Handlers +AicData: + .word AIC_BASE @ AIC Base Address +@------------------------------------------------------------------------------ +@- Default Interrupt Handler +@--------------------------- +@- These function are defined in the AT91 library. If you want to change this +@- you can redifine these function in your appication code +@------------------------------------------------------------------------------ + +PtDefaultHandler: + .word at91_default_fiq_handler + .word at91_default_irq_handler + .word at91_spurious_handler + +at91_default_fiq_handler: B at91_default_fiq_handler +at91_default_irq_handler: B at91_default_irq_handler +at91_spurious_handler: B at91_spurious_handler + +EndInitAic: + +@------------------------------------------------------------------------------ +@- Setup Exception Vectors in Internal RAM before Remap +@------------------------------------------------------ +@- That's important to perform this operation before Remap in order to guarantee +@- that the core has valid vectors at any time during the remap operation. +@- Note: There are only 5 offsets as the vectoring is used. +@- ICE note : In this code only the start address value is changed if you use +@- without Semihosting. +@- Before Remap the internal RAM it's 0x300000 +@- After Remap the internal RAM it's 0x000000 +@- Remap it's already executed it's no possible to write to 0x300000. +@------------------------------------------------------------------------------ +@- Copy the ARM exception vectors + + mov r0, #0x28 + adr r1, Init_Vector + str r1,[r0] + mov r0, #0x08 + adr r1, VectorTable+8 + ldr r1,[r1] + str r1,[r0] + swi 0 + +@ The RAM_BASE = 0 it's specific for ICE + + RAM_BASE = 0 +Init_Vector: + mov r8, #RAM_BASE @ @ of the hard vector after remap in internal RAM 0x0 + + adr r9, VectorTable @ where to read values (relative) + ldmia r9!, {r0-r7} @ read 8 vectors + + stmia r8!, {r0-r7} @ store them + + ldmia r9!, {r0-r4} @ read 5 absolute handler addresses + stmia r8!, {r0-r4} @ store them + +@------------------------------------------------------------------------------ +@- Initialise the Memory Controller +@---------------------------------- +@- That's principaly the Remap Command. Actually, all the External Bus +@- Interface is configured with some instructions and the User Interface Image +@- as described above. The jump "mov pc, r12" could be unread as it is after +@- located after the Remap but actually it is thanks to the Arm core pipeline. +@- The IniTableEBI addressing must be relative . +@- The PtInitRemap must be absolute as the processor jumps at this address +@- immediatly after the Remap is performed. +@- Note also that the EBI base address is loaded in r11 by the "ldmia". +@- ICE note :For ICE debug these values already set by the boot function and the +@- Remap it's already executed it's no need to set still. +@------------------------------------------------------------------------------ +@- Copy the Image of the Memory Controller + adr r10, InitTableEBI @ get the address of the chip select register image + ldr r12, PtInitRemap @ get the real jump address ( after remap ) + +@- Copy Chip Select Register Image to Memory Controller and command remap + ldmia r10!, {r0-r9,r11} @ load the complete image and the EBI base + stmia r11!, {r0-r9} @ store the complete image with the remap command + +@- Jump to ROM at its new address + mov pc, r12 @ jump and break the pipeline + +PtInitRemap: + .word InitRemap @ address where to jump after REMAP + +@------------------------------------------------------------------------------ +@- The Reset Handler after Remap +@------------------------------- +@- From here, the code is continous execute from its link address. +@------------------------------------------------------------------------------ + +InitRemap: + +@-------------------------------- +@- ARM Core Mode and Status Bits +@-------------------------------- + +ARM_MODE_USER = 0x10 +ARM_MODE_FIQ = 0x11 +ARM_MODE_IRQ = 0x12 +ARM_MODE_SVC = 0x13 +ARM_MODE_ABORT = 0x17 +ARM_MODE_UNDEF = 0x1B +ARM_MODE_SYS = 0x1F + +I_BIT = 0x80 +F_BIT = 0x40 +T_BIT = 0x20 + +@------------------------------------------------------------------------------ +@- Stack Sizes Definition +@------------------------ +@- Interrupt Stack requires 3 words x 8 priority level x 4 bytes when using +@- the vectoring. This assume that the IRQ_ENTRY/IRQ_EXIT macro are used. +@- The Interrupt Stack must be adjusted depending on the interrupt handlers. +@- Fast Interrupt is the same than Interrupt without priority level. +@- Other stacks are defined by default to save one word each. +@- The System stack size is not defined and is limited by the free internal +@- SRAM. +@- User stack size is not defined and is limited by the free external SRAM. +@------------------------------------------------------------------------------ + +IRQ_STACK_SIZE = (3*8*4) @ 3 words per interrupt priority level +FIQ_STACK_SIZE = (3*4) @ 3 words +ABT_STACK_SIZE = (1*4) @ 1 word +UND_STACK_SIZE = (1*4) @ 1 word + +@------------------------------------------------------------------------------ +@- Top of Stack Definition +@------------------------- +@- Fast Interrupt, Interrupt, Abort, Undefined and Supervisor Stack are located +@- at the top of internal memory in order to speed the exception handling +@- context saving and restoring. +@- User (Application, C) Stack is located at the top of the external memory. +@------------------------------------------------------------------------------ +RAM_BASE = 0 +RAM_SIZE = (2*1024) +RAM_LIMIT = (RAM_BASE+RAM_SIZE) +EXT_SRAM_BASE = 0x02000000 +EXT_SRAM_SIZE = 0x00040000 @ 256Kbytes +EXT_SRAM_LIMIT = (EXT_SRAM_BASE+EXT_SRAM_SIZE) + +TOP_EXCEPTION_STACK = RAM_LIMIT @ Defined in part +TOP_APPLICATION_STACK = EXT_SRAM_LIMIT @ Defined in Target + +@------------------------------------------------------------------------------ +@- Setup the stack for each mode +@------------------------------- + ldr r0, =TOP_EXCEPTION_STACK + +@- Set up Fast Interrupt Mode and set FIQ Mode Stack + msr CPSR_c, #ARM_MODE_FIQ | I_BIT |F_BIT + mov r13, r0 @ Init stack FIQ + sub r0, r0, #FIQ_STACK_SIZE + +@- Set up Interrupt Mode and set IRQ Mode Stack + msr CPSR_c, #ARM_MODE_IRQ | I_BIT |F_BIT + mov r13, r0 @ Init stack IRQ + sub r0, r0, #IRQ_STACK_SIZE + +@- Set up Abort Mode and set Abort Mode Stack + msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT + mov r13, r0 @ Init stack Abort + sub r0, r0, #ABT_STACK_SIZE + +@- Set up Undefined Instruction Mode and set Undef Mode Stack + msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT + mov r13, r0 @ Init stack Undef + sub r0, r0, #UND_STACK_SIZE + +@- Set up Supervisor Mode and set Supervisor Mode Stack + msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT + mov sp, r0 @ Init stack Sup +@------------------------------------------------------------------------------ +@- Setup Application Operating Mode and Enable the interrupts +@------------------------------------------------------------ +@- System Mode is selected first and the stack is setup. This allows to prevent +@- any interrupt occurence while the User is not initialized. System Mode is +@- used as the interrupt enabling would be avoided from User Mode (CPSR cannot +@- be written while the core is in User Mode). +@------------------------------------------------------------------------------ + msr CPSR_c, #ARM_MODE_USER @ set User mode + ldr sp, =TOP_APPLICATION_STACK @ Init stack User + +@------------------------------------------------------------------------------ +@- Initialise C variables +@------------------------ +@- Following labels are automatically generated by the linker. +@- RO: Read-only = the code +@- RW: Read Write = the data pre-initialized and zero-initialized. +@- ZI: Zero-Initialized. +@- Pre-initialization values are located after the code area in the image. +@- Zero-initialized datas are mapped after the pre-initialized. +@- Note on the Data position : +@- If using the ARMSDT, when no -rw-base option is used for the linker, the +@- data area is mapped after the code. You can map the data either in internal +@- SRAM ( -rw-base=0x40 or 0x34) or in external SRAM ( -rw-base=0x2000000 ). +@- Note also that to improve the code density, the pre_initialized data must +@- be limited to a minimum. +@------------------------------------------------------------------------------ + + ldr r3, = __bss_start__ @ Zero init base => top of init +NoRW: ldr r1, = __bss_end__ @ Top of zero init segment + mov r2, #0 +LoopZI: cmp r3, r1 @ Zero init + strcc r2, [r3], #4 + bcc LoopZI + + + +@------------------------------------------------------------------------------ +@- Branch on C code Main function (with interworking) +@---------------------------------------------------- +@- Branch must be performed by an interworking call as either an ARM or Thumb +@- main C function must be supported. This makes the code not position- +@- independant. A Branch with link would generate errors +@------------------------------------------------------------------------------ + + bl main + +@------------------------------------------------------------------------------ +@- Loop for ever +@--------------- +@- End of application. Normally, never occur. +@- Could jump on Software Reset ( B 0x0 ). +@------------------------------------------------------------------------------ +End: + b End + .END diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/frank_micsys2_praktikum05.zip b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/frank_micsys2_praktikum05.zip Binary files differnew file mode 100644 index 0000000..7771896 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/frank_micsys2_praktikum05.zip diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/makefile b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/makefile new file mode 100644 index 0000000..ff54938 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/makefile @@ -0,0 +1,59 @@ +# Vorschlag eines Makefile zu Termin5 WS2004
+
+FILE = Termin5Aufgabe3
+Opti = 0
+all:
+
+# bersetzen der Quelldatei
+ arm-elf-gcc -c -g -O$(Opti) $(FILE).c -I ../h
+
+# Erzeugen der Assemblerdatei aus der Quelldatei
+ arm-elf-gcc -S -o$(Opti) $(FILE).c -I ../h
+
+# Erzeugen der bentitgen Objektdateien
+ arm-elf-gcc -c -g -O$(Opti) ../boot/swi.S -o swi.o -I ../h
+# eigener SoftWareInterrupt-Handler
+ arm-elf-gcc -c -g -O$(Opti) swi.S -o swi.o -I ../h
+ arm-elf-gcc -c -g -O$(Opti) ../boot/boot_ice.S -o boot_ice.o -I ../h
+ arm-elf-gcc -c -g -O$(Opti) ../boot/boot_flash.S -o boot_flash.o -I ../h
+ arm-elf-gcc -c -g -O$(Opti) seriell.S -I ../h
+ arm-elf-gcc -c -g -O$(Opti) ser_io.S -I ../h
+ arm-elf-gcc -c -g -O$(Opti) boot.S -I ../h
+
+
+# Binden fr die RAM-Version
+ arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot_ice.o swi.o seriell.o ser_io.o $(FILE).o -o $(FILE).elf /gnutools/lib/gcc-lib/arm-elf/3.3.2/libgcc.a
+# arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot_ice.o swi.o $(FILE).o -o $(FILE).elf /gnutools/lib/gcc-lib/arm-elf/3.3.2/libgcc.a
+# arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot_ice.o swi.o $(FILE).o -o $(FILE).elf
+
+# Linkerskripte noch nicht getestet
+# arm-elf-ld -T ldscript.ram boot.o swi.o seriell.o ser_io.o swi.o $(FILE).o -o $(FILE).elf /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a
+
+# Binden fr die FLASH-Version
+# arm-elf-ld -Ttext 0x1000000 boot.o swi.o $(FILE).o -o $(FILE).out /gnutools/lib/gcc-lib/arm-elf/3.3.2/libgcc.a
+# arm-elf-ld -Ttext 0x1000000 boot_flash.o swi.o $(FILE).o -o $(FILE).out
+
+# Linkerskripte noch nicht getestet
+# arm-elf-ld -T ldscript.rom boot.o seriell.o ser_io.o swi.o $(FILE).o -o $(FILE).out /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a
+
+# -I --input-target <bfdname> Assume input file is in format <bfdname>
+# -O --output-target <bfdname> Create an output file in format <bfdname>
+# -S --strip-all Remove all symbol and relocation information
+# -x --discard-all Remove all non-global symbols
+# -N --strip-symbol <name> Do not copy symbol <name>
+# -O --output-target <bfdname> Create an output file in format <bfdname>
+# -g --strip-debug Remove all debugging symbols
+# arm-elf-objcopy -I elf32-littlearm -O binary -x -S -N -g $(FILE).out $(FILE).rom
+
+# programm.rom nach /tftpboot/downlaod.bin kopieren <cp name.rom /tftpboot/download.bin>
+# Jumper E7 mu auf STD stecken
+# Mit <telnet 141.100.xxx.xxx> mit dem BDI2000 verbinden.
+# mit <erase 0x1100000> flash-Bereich lschen
+# mit <prog 0x1100000 download.bin bin> Programm ins flash schreiben.
+#
+#
+clean:
+ rm *.o
+ rm *.s
+ rm *.elf
+ rm *.rom
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/ser_io.S b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/ser_io.S new file mode 100644 index 0000000..a8f76a8 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/ser_io.S @@ -0,0 +1,57 @@ +@---------------------------------------------------------------------------- +@ File Name : ser_io.S +@ Object : Ein- Ausgabe-Funktionen der seriellen Schnittstelle +@ +@ Namen : Matr.-Nr.: +@ : Matr.-Nr.: +@ +@---------------------------------------------------------------------------- + +@ Debuginformationen + .file "ser_io.S" + +@ Funktion + .text + .align 2 + .global inits + .type inits,function +inits: + stmfd sp!,{lr} @ Retten der Register + swi 0 + ldmfd sp!,{pc} @ Rcksprung + +@ Funktion + .text + .align 2 + .global puts + .type puts,function +puts: + stmfd sp!,{lr} @ Retten der Register + +// Hier mu Ihr Code eingefgt werden. + mov r5, r0 @ Anfangsadresse des kompletten Strings von r0 nach r5 kopieren +loop: ldrb r0, [r5], #1 @ Holen des Zeichens der Adresse in r5 nach r0 und erhhe dann Adresse in r5 + cmp r0, #0 @ Ende des Strings? entspricht binrer Null + beq L1 @ Wenn Stringende erreicht + swi 1 @ Auslsen der SWI Methode putchar (swi + offset) + b loop @ weiter bei loop solange Stringende nicht erreicht +L1: + mov r0, #0x0d @ Carriage Return + swi 1 @ Auslsen der SWI Methode putchar (swi + offset) + mov r0, #0x0a @ Linefeed + swi 1 @ Auslsen der SWI Methode putchar (swi + offset) + ldmfd sp!,{pc} @ Rcksprung + +@ Funktion + .text + .align 2 + .global gets + .type gets,function +gets: + stmfd sp!,{lr} @ Retten der Register + +// Hier knnte Ihr Code eingefgt werden! + + ldmfd sp!,{pc} @ Rcksprung + +.end diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/seriell.S b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/seriell.S new file mode 100644 index 0000000..9560075 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/seriell.S @@ -0,0 +1,73 @@ +@---------------------------------------------------------------------------- +@ File Name : seriell.S +@ Object : Grundfunktionen der seriellen Schnittstelle +@ +@ 1.0 27/10/02 GR : Creation +@---------------------------------------------------------------------------- + + .file "seriell.S" + +#include "../h/pmc.inc" +#include "../h/pio.inc" +#include "../h/usart.inc" + +DEFAULT_BAUD = 38400 +CLOCK_SPEED = 25000000 +US_BAUD = 0x29 @ CLOCK_SPEED / (16*(DEFAULT_BAUD)) + +@ Funktion + .text + .align 2 + .global init_ser + .type init_ser,function +init_ser: + stmfd sp!, {r0-r3, lr} @ Register retten + adr r0,L1 + adr r1,L1_end +init_ser_loop: + ldmia r0!, {r2-r3} + cmp r0, r1 + str r3, [r2] + bne init_ser_loop + ldmfd sp!, {r0-r3, pc} @ Rcksprung +L1: + .word PMC_BASE+PMC_PCER, 0x4 + .word PIOA_BASE+PIO_PDR, 0x18000 + .word USART0_BASE+US_CR, 0xa0 + .word USART0_BASE+US_MR, 0x8c0 + .word USART0_BASE+US_BRGR, US_BAUD + .word USART0_BASE+US_CR, 0x50 +L1_end: + +@ Funktion + .text + .align 2 + .global putchar + .type putchar,function +putchar: + stmfd sp!, {r0-r2, lr} @ Register retten + ldr r2, =USART0_BASE +1: + ldr r1, [r2, #US_CSR] + tst r1, #US_TXRDY @ ist Transmitter frei + beq 1b + str r0, [r2,#US_THR] + ldmfd sp!, {r0-r2, pc} @ Rcksprung + +@ Funktion + .text + .align 2 + .global getchar + .type getchar,function +getchar: + stmfd sp!, {r1, r2, lr} @ Register retten + ldr r2, =USART0_BASE + +1: + ldr r1, [r2, #US_CSR] + ands r1, r1, #US_RXRDY + beq 1b + ldr r0, [r2, #US_RHR] + ldmfd sp!, {r1, r2, pc} @ Rcksprung + +.end diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/swi.S b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/swi.S new file mode 100644 index 0000000..09d5cc4 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/swi.S @@ -0,0 +1,34 @@ +@---------------------------------------------------------------------------- +@ File Name : swi.S +@ Object : SoftwareInterruptHandler +@ +@ 1.0 27/10/02 GR : Creation +@ +@---------------------------------------------------------------------------- + + + .global SWIHandler + .text +SWIHandler: + + ldr sp, STACK @ den Wert von STACK (0x78c) auf sp kopieren + stmfd sp!, {lr} @ retten der Rcksprungadresse + ldr ip,[r14, #-4] @ hole "swi X" Aufruf in ip (lr steht auf Aufruf nach swi Befehl im aufrufenden Programm) + bic ip, ip, #0xff000000 @ maskiere X aus und speichere in ip + mov ip, ip, lsl #2 @ X ist in ip, X * 4 (entspricht lsl #2) ist Offset des swi + ldr lr, =SWIJumpTable @ Lade Adresse von SWIJumpTable in lr + ldr ip, [lr, ip] @ Addiere ip (Offset des SWI) zu Adresse SWIJumpTable und speichere in ip + mov lr, pc @ Speichere pc in lr fr Rcksprung + mov pc, ip @ Lade ip nach pc, entspricht Sprung in jeweilige SWI-Routine + ldmfd sp!, {pc}^ @ Rcksprung +STACK: + .word 0x78c + +SWIJumpTable: + .word init_ser + .word putchar + .word getchar +.end + + + diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Doku.odt b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Doku.odt Binary files differnew file mode 100644 index 0000000..9fdfe2a --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Doku.odt diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Doku.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Doku.pdf Binary files differnew file mode 100644 index 0000000..ba7abd9 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Doku.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Doku.sxw b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Doku.sxw Binary files differnew file mode 100644 index 0000000..6a2f644 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Doku.sxw diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Termin6.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Termin6.pdf Binary files differnew file mode 100644 index 0000000..e9f745b --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Termin6.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Termin6Aufgabe1.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Termin6Aufgabe1.c new file mode 100644 index 0000000..c4ffe50 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Termin6Aufgabe1.c @@ -0,0 +1,288 @@ +// Lsung zu Termin6&7 +// Aufgabe 1... +// Namen: Andreas Spirka; Sven Eisenhauer +// Matr.: 702789; 707173 +// vom : 25.01.2006 + + +#include "../h/pmc.h" +#include "../h/tc.h" +#include "../h/pio.h" +#include "../h/aic.h" + +void pmcinit(void); +void pioinit(void); +void Timer_init(void); +int massemessen(void); +void pumpestart(void); +void pumpestop(void); +void greeting(void); +void ausgabe(int); +int genaumessen(void); +void Int2Str(int); +void taste_irq_handler (void) __attribute__ ((interrupt)); + +volatile int aktion=0; +char lf[2]; +char cr[2]; + +// fr die Initialisierung der Zhler TC4 und TC5 + +#define TC4_INIT TC_CLKS_MCK2 | TC_LDBSTOP | TC_CAPT | TC_LDRA_RISING_EDGE | TC_LDRB_RISING_EDGE +#define TC5_INIT TC_CLKS_MCK2 | TC_LDBSTOP | TC_CAPT | TC_LDRA_RISING_EDGE | TC_LDRB_RISING_EDGE + +// Interruptserviceroutine fr die Tasten SW1 und SW2 +void taste_irq_handler (void) +{ + StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B + StructAIC* aicbase = AIC_BASE; // Basisadresse Advanced Interrupt Controller + int taste = piobaseB->PIO_PDSR; + if (!(taste & KEY1)) // falls Schalter 1 gedrckt + aktion=1; + if (!(taste & KEY2)) // falls Schalter 2 gedrckt + aktion=2; + + aicbase->AIC_EOICR = piobaseB->PIO_ISR; // AIC End of Interrupt Command Register = 1 +} + +void pmcinit(void) +{ + StructPMC* pmcbase = PMC_BASE; + pmcbase->PMC_PCER = 0x06f84; // Clock PIOA, PIOB, Timer5, Timer4, Timer3,US0 einschalten +} + +void pioinit(void) +{ + StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B + StructAIC* aicbase = AIC_BASE; // Basisadresse Advanced Interrupt Controller + // disable all interrupt sources of pio + piobaseB->PIO_IDR = 0xFFFFFFFF; + piobaseB->PIO_PER = KEY1|KEY2; // Schalter 1-2 enabeled + // Interrupt Initialisierung fr PIOB (0x4000) + aicbase->AIC_IDCR = (1<<PIOB_ID); // Interrupt disabled + aicbase->AIC_ICCR = (1<<PIOB_ID); // Interrupt clear + aicbase->AIC_SMR[PIOB_ID] = 0x1; // An Stelle 14 Level Sensitive / Hchste Prioritt + aicbase->AIC_SVR[PIOB_ID] = (unsigned int)taste_irq_handler; // Adresse der Interrupt Service Routine in Vektor-Tabelle + aicbase->AIC_IECR = (1<<PIOB_ID); // enable PIOB Interrupt in AIC + piobaseB->PIO_IER = KEY1|KEY2; // Schalter 1+2 lsen Interrupts aus +} + +void Timer_init(void) +{ + StructTC* tcbase3 = TCB3_BASE; // Basisadressse TC Block 3 Pumpe + StructTC* tcbase4 = TCB4_BASE; // Basisadressse TC Block 4 Waage + StructTC* tcbase5 = TCB5_BASE; // Basisadressse TC Block 5 Waage + StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO A + + tcbase3->TC_CCR = TC_CLKDIS; // Disable Clock + + // Initialize the mode of the timer 3 + tcbase3->TC_CMR = + TC_ACPC_CLEAR_OUTPUT | //ACPC : Register C clear TIOA + TC_ACPA_SET_OUTPUT | //ACPA : Register A set TIOA + TC_WAVE | //WAVE : Waveform mode + TC_CPCTRG | //CPCTRG : Register C compare trigger enable + TC_CLKS_MCK1024; //TCCLKS : MCKI / 1024 + + // Initialize the counter: + tcbase3->TC_RA = 244; + tcbase3->TC_RC = 488; // RA = RC/2 fr symmetrisches Signal + + // Start the timer : + tcbase3->TC_CCR = TC_CLKEN ; //__ + tcbase3->TC_CCR = TC_SWTRG ; //__ + piobaseA->PIO_PER = (1<<PIOTIOA3) ; // Pio herrscht ber pin + piobaseA->PIO_OER = (1<<PIOTIOA3) ; // Output an pin + piobaseA->PIO_CODR = (1<<PIOTIOA3) ; // clear output -> low signal, pumpe aus + +// Periodendauer der Waagensignale messen +// Signal aud TIOA4 ca. 16kHz entspricht ca. einer Periodendauer von 62,5us +// durch den Teiler von 32 ergeben sich ca. 2ms +// Zhler mit positiver Flanke starten + + //piobaseA->PIO_PDR = 0x090; + piobaseA->PIO_PDR = (1<<PIOTIOA4)|(1<<PIOTIOA5); + tcbase4->TC_CCR = TC_CLKDIS; + tcbase4->TC_CMR = TC4_INIT; + tcbase4->TC_CCR = TC_CLKEN; + tcbase4->TC_CCR = TC_SWTRG; + + tcbase5->TC_CCR = TC_CLKDIS; + tcbase5->TC_CMR = TC5_INIT; + tcbase5->TC_CCR = TC_CLKEN; + tcbase5->TC_CCR = TC_SWTRG; +} + +int massemessen(void) +{ + StructTC* tcbase4 = TCB4_BASE; + StructTC* tcbase5 = TCB5_BASE; + volatile int captureRA1; + volatile int captureRB1; + volatile int capturediff1; + volatile float Periodendauer1; + volatile int captureRA2; + volatile int captureRB2; + volatile int capturediff2; + volatile float Periodendauer2; + volatile int c1=18030; + volatile int c2=40; + volatile int masse; + + tcbase4->TC_CCR = TC_SWTRG; + tcbase5->TC_CCR = TC_SWTRG; + while (!( tcbase4->TC_SR & TC_LDBSTOP)); // Capture Register B wurde geladen Messung abgeschlossen + captureRA1 = tcbase4->TC_RA; // + captureRB1 = tcbase4->TC_RB; + capturediff1 = abs(captureRB1) - abs(captureRA1); + Periodendauer1 = abs(capturediff1); + while (!( tcbase5->TC_SR & TC_LDBSTOP)); // Capture Register B wurde geladen Messung abgeschlossen + captureRA2 = tcbase5->TC_RA; // + captureRB2 = tcbase5->TC_RB; + capturediff2 = abs(captureRB2) - abs(captureRA2); + Periodendauer2 = abs(capturediff2); + + masse = c1 * ((Periodendauer1 / Periodendauer2) -1) -c2; + return masse; +} + +void pumpestart(void) +{ + StructPIO* piobaseA = PIOA_BASE; + piobaseA->PIO_PDR = (1<<PIOTIOA3); // Timer herrscht ber Bit (Taktsignal) +} + +void pumpestop(void) +{ + StructPIO* piobaseA = PIOA_BASE; + // Vermeiden, da dauerhaftes High Signal (PIO herrscht ber das BIT) + piobaseA->PIO_PER = (1<<PIOTIOA3) ; // PIN der PIO zuweisen + piobaseA->PIO_OER = (1<<PIOTIOA3) ; // wird auf Output gesetzt + piobaseA->PIO_CODR = (1<<PIOTIOA3) ; // Clear Output (low Signal) +} + +void greeting(void) +{ + cr[0]=0x0d; + lf[0]=0x0a; + lf[1]='\0'; + cr[1]='\0'; + puts("AUSSCHANKSTATION\0"); + puts(&cr[0]); + puts(&lf[0]); + puts("Bitte Becher auf die Waage stellen\0"); + puts(&cr[0]); + puts(&lf[0]); + puts("SW1 zum tarieren drcken\0"); + puts(&cr[0]); + puts(&lf[0]); +} + +void ausgabe(int m) +{ + cr[0]=0x0d; + lf[0]=0x0a; + lf[1]='\0'; + cr[1]='\0'; + puts("Gemessene Gesamtmasse: \0"); + Int2Str(m); + puts(&cr[0]); + puts(&lf[0]); + puts("Becher kann entfernt werden\0"); + puts(&cr[0]); + puts(&lf[0]); + +} + +void Int2Str(int m) +{ + int a,i=7; + char string[9]; + string[8] = '\0'; + + while(m != 0) + { + a = m%10; + string[i] = a + '0'; + m = m/10; + i--; + } + puts(&string[i+1]); +} + +int genaumessen(void) +{ + volatile int durchlaeufe=10; + volatile int summe=0; + volatile int retVal=0; + volatile int i=0; + for (i=0;i<durchlaeufe;i++) + { + summe+=massemessen(); + } + retVal= summe/durchlaeufe; + return retVal; +} + +int main(void) +{ + volatile int masse=0; + volatile int tara=0; + volatile int netto=0; + + cr[0]=0x0d; + lf[0]=0x0a; + lf[1]='\0'; + cr[1]='\0'; + + inits(); + greeting(); + pmcinit(); + Timer_init(); + pioinit(); + + for(;;) + { + if(aktion == 1) + { + puts("Tara: \0"); + tara=genaumessen(); + netto=0; + Int2Str(tara); + puts(" SW2 startet die Pumpe"); + puts(&cr[0]); + aktion=0; + } + if (aktion == 2 && tara != 0) + { + puts(&cr[0]); + puts(&lf[0]); + pumpestart(); + while(netto <= 50) + { + masse=genaumessen(); + netto=masse-tara; + puts("Fuellgewicht: \0"); + Int2Str(netto); + puts(&cr[0]); + } + pumpestop(); + ausgabe(masse); + do { + masse=genaumessen(); + } + while (masse > 10); + // Gewicht hat sich gendert, d. h. Becher wurde entfernt + // D. h. von vorne starten + greeting(); + aktion=0; + } + } + // disable piob command register in AIC + //aicbase->AIC_IDCR = (1<<PIOB_ID); + // disable all interrupt sources of pio + //piobaseB->PIO_IDR = 0xFFFFFFFF; + // Timer (0x200), PIOA (0x2000), PIOB (0x4000) ausschalten + //pmcbase->PMC_PCDR = (1<<PIOA_ID)|(1<<PIOB_ID)|(1<<TC3_ID); + return 0; +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/doku.txt b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/doku.txt new file mode 100644 index 0000000..ebab65e --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/doku.txt @@ -0,0 +1,19 @@ +Dokumentaion Ausschankstation
+
+1. Nach dem Start des Programms erscheint ein Begrungstext
+ auf der seriellen Konsole.
+
+2. Stellen Sie einen Becher oder ein Glas auf die Waage.
+
+3. Drcken Sie die Taste SW1 zum tarieren der Waage.
+
+4. Drcken Sie die Taste SW2 zum Start des Abfllvorgangs.
+
+5. Es werden 50 ml bzw. g abgefllt.
+
+6. Auf der seriellen Konsole erscheint das Gesamtgewicht
+ auf der Waage. (Behlter plus Inhalt)
+
+7. Entfernen Sie den Becher.
+
+8. Starten Sie einen weiteren Abfllvorgang mit Schritt 2.
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/frank_micsys2_praktikum06.zip b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/frank_micsys2_praktikum06.zip Binary files differnew file mode 100644 index 0000000..70ea757 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/frank_micsys2_praktikum06.zip diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/makefile b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/makefile new file mode 100644 index 0000000..9cf7745 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/makefile @@ -0,0 +1,52 @@ +FILE = Termin6Aufgabe1 +Opti = 0 +all: + +# bersetzen der Quelldatei + arm-elf-gcc -c -g -O$(Opti) $(FILE).c -I ../h + +# Erzeugen der Assemblerdatei aus der Quelldatei + arm-elf-gcc -S -O$(Opti) $(FILE).c -I ../h + +# Erzeugen der bentitgen Objektdateien + arm-elf-gcc -c -g -O$(Opti) swi.S -o swi.o -I ../h + arm-elf-gcc -c -g -O$(Opti) ../boot/boot.s -o boot.o -I ../h +# arm-elf-gcc -c -g -O$(Opti) ../boot/boot_ice.S -o boot_ice.o -I ../h +# arm-elf-gcc -c -g -O$(Opti) ../boot/boot_flash.S -o boot_flash.o -I ../h + arm-elf-gcc -c -g -O$(Opti) seriell.S -o seriell.o -I ../h + arm-elf-gcc -c -g -O$(Opti) ser_io.S -o ser_io.o -I ../h + +# Binden fr die RAM-Version + arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot.o swi.o seriell.o ser_io.o $(FILE).o -o $(FILE).elf /gnutools/lib/gcc-lib/arm-elf/3.3.2/libgcc.a +# arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot_ice.o swi.o $(FILE).o -o $(FILE).elf + +# Linkerskripte noch nicht getestet +# arm-elf-ld -T ldscript.ram boot.o swi.o seriell.o ser_io.o swi.o $(FILE).o -o $(FILE).elf /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a + +# Binden fr die FLASH-Version +# arm-elf-ld -Ttext 0x1000000 boot.o swi.o $(FILE).o -o $(FILE).out /usr/gnutools/lib/gcc-lib/arm-elf/3.3.2/libgcc.a +# arm-elf-ld -Ttext 0x1000000 boot_flash.o swi.o $(FILE).o -o $(FILE).out + +# Linkerskripte noch nicht getestet +# arm-elf-ld -T ldscript.rom boot.o seriell.o ser_io.o swi.o $(FILE).o -o $(FILE).out /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a + +# -I --input-target <bfdname> Assume input file is in format <bfdname> +# -O --output-target <bfdname> Create an output file in format <bfdname> +# -S --strip-all Remove all symbol and relocation information +# -x --discard-all Remove all non-global symbols +# -N --strip-symbol <name> Do not copy symbol <name> +# -O --output-target <bfdname> Create an output file in format <bfdname> +# -g --strip-debug Remove all debugging symbols +# arm-elf-objcopy -I elf32-littlearm -O binary -x -S -N -g $(FILE).out $(FILE).rom +# programm.rom nach /tftpboot/downlaod.bin kopieren <cp name.rom /tftpboot/download.bin> +# Jumper E7 mu auf STD stecken +# Mit <telnet 141.100.xxx.xxx> mit dem BDI2000 verbinden. +# mit <erase 0x1100000> flash-Bereich lschen +# mit <prog 0x1100000 download.bin bin> Programm ins flash schreiben. +# +# +clean: + rm *.o + rm *.s + rm *.elf + rm *.rom diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/ser_io.S b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/ser_io.S new file mode 100644 index 0000000..5bad2a8 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/ser_io.S @@ -0,0 +1,57 @@ +@---------------------------------------------------------------------------- +@ File Name : ser_io.S +@ Object : Ein- Ausgabe-Funktionen der seriellen Schnittstelle +@ +@ Namen : Matr.-Nr.: +@ : Matr.-Nr.: +@ +@---------------------------------------------------------------------------- + +@ Debuginformationen + .file "ser_io.S" + +@ Funktion + .text + .align 2 + .global inits + .type inits,function +inits: + stmfd sp!,{lr} @ Retten der Register + swi 0 + ldmfd sp!,{pc} @ Rcksprung + +@ Funktion + .text + .align 2 + .global puts + .type puts,function +puts: + stmfd sp!,{lr} @ Retten der Register + +// Hier mu Ihr Code eingefgt werden. + mov r5, r0 @ Anfangsadresse des kompletten Strings von r0 nach r5 kopieren +loop: ldrb r0, [r5], #1 @ Holen des Zeichens der Adresse in r5 nach r0 und erhhe dann Adresse in r5 + cmp r0, #0 @ Ende des Strings? entspricht binrer Null + beq L1 @ Wenn Stringende erreicht + swi 1 @ Auslsen der SWI Methode putchar (swi + offset) + b loop @ weiter bei loop solange Stringende nicht erreicht +L1: + @mov r0, #0x0d @ Carriage Return + @swi 1 @ Auslsen der SWI Methode putchar (swi + offset) + @mov r0, #0x0a @ Linefeed + @swi 1 @ Auslsen der SWI Methode putchar (swi + offset) + ldmfd sp!,{pc} @ Rcksprung + +@ Funktion + .text + .align 2 + .global gets + .type gets,function +gets: + stmfd sp!,{lr} @ Retten der Register + +// Hier knnte Ihr Code eingefgt werden! + + ldmfd sp!,{pc} @ Rcksprung + +.end diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/seriell.S b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/seriell.S new file mode 100644 index 0000000..9560075 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/seriell.S @@ -0,0 +1,73 @@ +@---------------------------------------------------------------------------- +@ File Name : seriell.S +@ Object : Grundfunktionen der seriellen Schnittstelle +@ +@ 1.0 27/10/02 GR : Creation +@---------------------------------------------------------------------------- + + .file "seriell.S" + +#include "../h/pmc.inc" +#include "../h/pio.inc" +#include "../h/usart.inc" + +DEFAULT_BAUD = 38400 +CLOCK_SPEED = 25000000 +US_BAUD = 0x29 @ CLOCK_SPEED / (16*(DEFAULT_BAUD)) + +@ Funktion + .text + .align 2 + .global init_ser + .type init_ser,function +init_ser: + stmfd sp!, {r0-r3, lr} @ Register retten + adr r0,L1 + adr r1,L1_end +init_ser_loop: + ldmia r0!, {r2-r3} + cmp r0, r1 + str r3, [r2] + bne init_ser_loop + ldmfd sp!, {r0-r3, pc} @ Rcksprung +L1: + .word PMC_BASE+PMC_PCER, 0x4 + .word PIOA_BASE+PIO_PDR, 0x18000 + .word USART0_BASE+US_CR, 0xa0 + .word USART0_BASE+US_MR, 0x8c0 + .word USART0_BASE+US_BRGR, US_BAUD + .word USART0_BASE+US_CR, 0x50 +L1_end: + +@ Funktion + .text + .align 2 + .global putchar + .type putchar,function +putchar: + stmfd sp!, {r0-r2, lr} @ Register retten + ldr r2, =USART0_BASE +1: + ldr r1, [r2, #US_CSR] + tst r1, #US_TXRDY @ ist Transmitter frei + beq 1b + str r0, [r2,#US_THR] + ldmfd sp!, {r0-r2, pc} @ Rcksprung + +@ Funktion + .text + .align 2 + .global getchar + .type getchar,function +getchar: + stmfd sp!, {r1, r2, lr} @ Register retten + ldr r2, =USART0_BASE + +1: + ldr r1, [r2, #US_CSR] + ands r1, r1, #US_RXRDY + beq 1b + ldr r0, [r2, #US_RHR] + ldmfd sp!, {r1, r2, pc} @ Rcksprung + +.end diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/swi.S b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/swi.S new file mode 100644 index 0000000..09d5cc4 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/swi.S @@ -0,0 +1,34 @@ +@---------------------------------------------------------------------------- +@ File Name : swi.S +@ Object : SoftwareInterruptHandler +@ +@ 1.0 27/10/02 GR : Creation +@ +@---------------------------------------------------------------------------- + + + .global SWIHandler + .text +SWIHandler: + + ldr sp, STACK @ den Wert von STACK (0x78c) auf sp kopieren + stmfd sp!, {lr} @ retten der Rcksprungadresse + ldr ip,[r14, #-4] @ hole "swi X" Aufruf in ip (lr steht auf Aufruf nach swi Befehl im aufrufenden Programm) + bic ip, ip, #0xff000000 @ maskiere X aus und speichere in ip + mov ip, ip, lsl #2 @ X ist in ip, X * 4 (entspricht lsl #2) ist Offset des swi + ldr lr, =SWIJumpTable @ Lade Adresse von SWIJumpTable in lr + ldr ip, [lr, ip] @ Addiere ip (Offset des SWI) zu Adresse SWIJumpTable und speichere in ip + mov lr, pc @ Speichere pc in lr fr Rcksprung + mov pc, ip @ Lade ip nach pc, entspricht Sprung in jeweilige SWI-Routine + ldmfd sp!, {pc}^ @ Rcksprung +STACK: + .word 0x78c + +SWIJumpTable: + .word init_ser + .word putchar + .word getchar +.end + + + diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/boot/aic.inc b/Bachelor/Mikroprozessorsysteme2/mi2/boot/aic.inc new file mode 100644 index 0000000..c2722b7 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/boot/aic.inc @@ -0,0 +1,54 @@ +@------------------------------------------ +@- AIC User Interface Structure Definition +@------------------------------------------ + +AIC_SMR = 0 @- Source Mode Register +AIC_SVR = 0x80 @- Source Vector Register +AIC_IVR = 0x100 @- IRQ Vector Register +AIC_FVR = 0x104 @- FIQ Vector Register +AIC_ISR = 0x108 @- Interrupt Status Register +AIC_IPR = 0x10c @- Interrupt Pending Register +AIC_IMR = 0x110 @- Interrupt Mask Register +AIC_CISR = 0x114 @- Core Interrupt Status Register +@ = 0x118 @- Reserved 0 +@ = 0x11c @- Reserved 1 +AIC_IECR = 0x120 @- Interrupt Enable Command Register +AIC_IDCR = 0x124 @- Interrupt Disable Command Register +AIC_ICCR = 0x128 @- Interrupt Clear Command Register +AIC_ISCR = 0x12c @- Interrupt Set Command Register +AIC_EOICR = 0x130 @- of Interrupt Command Register +AIC_SPU = 0x134 @- Spurious Vector Register + +@--------------------------------------------- +@- AIC_SMR[]: Interrupt Source Mode Registers +@--------------------------------------------- + +AIC_PRIOR = 0x07 @- Priority + +AIC_SRCTYPE = 0x60 @- Source Type Definition +AIC_SRCTYPE_INT_LEVEL_SENSITIVE = 0x00 @- Level Sensitive +AIC_SRCTYPE_INT_EDGE_TRIGGERED = 0x20 @- Edge Triggered +AIC_SRCTYPE_EXT_LOW_LEVEL = 0x00 @- Low Level +AIC_SRCTYPE_EXT_NEGATIVE_EDGE = 0x20 @- Negative Edge +AIC_SRCTYPE_EXT_HIGH_LEVEL = 0x40 @- High Level +AIC_SRCTYPE_EXT_POSITIVE_EDGE = 0x60 @- Positive Edge + +@-------------------------------------- +@- AIC_ISR: Interrupt Status Register +@-------------------------------------- + +AIC_IRQID = 0x1F @- Current source interrupt + +@------------------------------------------- +@- AIC_CISR: Interrupt Core Status Register +@------------------------------------------- + +AIC_NFIQ = 0x01 @- Core FIQ Status +AIC_NIRQ = 0x02 @- Core IRQ Status + +@--------------------------------------------
+@- Advanced Interrupt COntroller BAse Address +@-------------------------------------------- + +AIC_BASE = 0xFFFFF000 + diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/boot/boot.s b/Bachelor/Mikroprozessorsysteme2/mi2/boot/boot.s new file mode 100644 index 0000000..4ba5a64 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/boot/boot.s @@ -0,0 +1,540 @@ +# 1 "../boot/boot.S" +# 1 "<built-in>" +# 1 "<command line>" +# 1 "../boot/boot.S" +@------------------------------------------------------------------------------ +@- ATMEL Microcontroller Software Support - ROUSSET - +@------------------------------------------------------------------------------ +@ The software is delivered "AS IS" without warranty or condition of any +@ kind, either express, implied or statutory. This includes without +@ limitation any warranty or condition with respect to merchantability or +@ fitness for any particular purpose, or against the infringements of +@ intellectual property rights of others. +@----------------------------------------------------------------------------- +@- File source : cstartup_ice.sboot.S +@- Object : Boot for simulate Final Application version to be +@- loaded in SRAM. Only change as the internal RAM address +@- and support the Semihosting +@- Compilation flag : SEMIHOSTING => use the semihosting facilities +@- +@- 1.0 17/09/02 GR : Creation +@------------------------------------------------------------------------------ + +# 1 "../boot/aic.inc" 1 +@------------------------------------------ +@- AIC User Interface Structure Definition +@------------------------------------------ + +AIC_SMR = 0 @- Source Mode Register +AIC_SVR = 0x80 @- Source Vector Register +AIC_IVR = 0x100 @- IRQ Vector Register +AIC_FVR = 0x104 @- FIQ Vector Register +AIC_ISR = 0x108 @- Interrupt Status Register +AIC_IPR = 0x10c @- Interrupt Pending Register +AIC_IMR = 0x110 @- Interrupt Mask Register +AIC_CISR = 0x114 @- Core Interrupt Status Register +@ = 0x118 @- Reserved 0 +@ = 0x11c @- Reserved 1 +AIC_IECR = 0x120 @- Interrupt Enable Command Register +AIC_IDCR = 0x124 @- Interrupt Disable Command Register +AIC_ICCR = 0x128 @- Interrupt Clear Command Register +AIC_ISCR = 0x12c @- Interrupt Set Command Register +AIC_EOICR = 0x130 @- of Interrupt Command Register +AIC_SPU = 0x134 @- Spurious Vector Register + +@--------------------------------------------- +@- AIC_SMR[]: Interrupt Source Mode Registers +@--------------------------------------------- + +AIC_PRIOR = 0x07 @- Priority + +AIC_SRCTYPE = 0x60 @- Source Type Definition +AIC_SRCTYPE_INT_LEVEL_SENSITIVE = 0x00 @- Level Sensitive +AIC_SRCTYPE_INT_EDGE_TRIGGERED = 0x20 @- Edge Triggered +AIC_SRCTYPE_EXT_LOW_LEVEL = 0x00 @- Low Level +AIC_SRCTYPE_EXT_NEGATIVE_EDGE = 0x20 @- Negative Edge +AIC_SRCTYPE_EXT_HIGH_LEVEL = 0x40 @- High Level +AIC_SRCTYPE_EXT_POSITIVE_EDGE = 0x60 @- Positive Edge + +@-------------------------------------- +@- AIC_ISR: Interrupt Status Register +@-------------------------------------- + +AIC_IRQID = 0x1F @- Current source interrupt + +@------------------------------------------- +@- AIC_CISR: Interrupt Core Status Register +@------------------------------------------- + +AIC_NFIQ = 0x01 @- Core FIQ Status +AIC_NIRQ = 0x02 @- Core IRQ Status + +@-------------------------------------------- +@- Advanced Interrupt COntroller BAse Address +@-------------------------------------------- + +AIC_BASE = 0xFFFFF000 +# 20 "../boot/boot.S" 2 +# 1 "../boot/ebi.inc" 1 +@------------------------------------------------------------------------------ +@- EBI Initialization Data +@------------------------- +@- The EBI values depend to target choice , Clock, and memories access time. +@- Yous must be define these values in include file +@- The EBI User Interface Image which is copied by the boot. +@- The EBI_CSR_x are defined in the target and hardware depend. +@- That's hardware! Details in the Electrical Datasheet of the AT91 device.' +@- EBI Base Address is added at the end for commodity in copy code. +@- ICE note :For ICE debug no need to set the EBI value these values already set +@- by the boot function. +@------------------------------------------------------------------------------ +FLASH_BASE = 0x1000000 +EXT_SRAM_BASE = 0x2000000 +EBI_BASE = 0xFFE00000 @- External Bus Interface + +EBI_CSR_0 = (FLASH_BASE | 0x2529) @ 0x01000000, 16MB, 2 tdf, 16 bits, 2 WS +EBI_CSR_1 = (EXT_SRAM_BASE | 0x2121) @ 0x02000000, 16MB, 0 hold, 16 bits, 1 WS +EBI_CSR_2 = 0x20000000 @ unused +EBI_CSR_3 = 0x30000000 @ unused +EBI_CSR_4 = 0x40000000 @ unused +EBI_CSR_5 = 0x50000000 @ unused +EBI_CSR_6 = 0x60000000 @ unused +EBI_CSR_7 = 0x70000000 @ unused +# 21 "../boot/boot.S" 2 + +@------------------------------------------------------------------------------ +@- Area Definition +@----------------- +@- Must be defined as function to put first in the code as it must be mapped +@- at SRAM. +@------------------------------------------------------------------------------ + + .text + +@------------------------------------------------------------------------------ +@- Semihosting support +@-------------------------------- +@- The C runtime library is the IO functions provided by the semihosting. +@- They are generally costly in code and can be used as the debugger mode (ICE) +@------------------------------------------------------------------------------ +@- Define "__main" to ensure that C runtime system is not linked + + .global _start +@------------------------------------------------------------------------------ +@- Define the entry point +@------------------------ +@- Note on the link address and the Remap command. +@- In order to guarantee that the non position-independant code (the ARM linker +@- armlink doesn't generate position-independant code) can work on the ARM, ' +@- it must be linked at address at which it expects to run. +@- In this startup example, we use RAM as base address. +@------------------------------------------------------------------------------ +_start: + +@------------------------------------------------------------------------------ +@- Exception vectors +@-------------------- +@- In the ICE function your board as run the boot code and initialize the remap +@- feature. but these code it's location independant and can be emulate the csartup_fash' +@- fonctionnality. +@- These vectors are read at RAM address. in Flash mode these vectors are at 0 +@- They absolutely requires to be in relative addresssing mode in order to +@- guarantee a valid jump. For the moment, all are just looping (what may be +@- dangerous in a final system). If an exception occurs before remap, this +@- would result in an infinite loop. +@------------------------------------------------------------------------------ + +Reset: B InitReset @ reset +undefvec: B undefvec @ Undefined Instruction +swivec: B swivec @ Software Interrupt +pabtvec: B pabtvec @ Prefetch Abort +dabtvec: B dabtvec @ Data Abort +rsvdvec: B rsvdvec @ reserved +irqvec: B irqvec @ reserved +fiqvec: B fiqvec @ reserved + +@------------------------------------------------------------------------------ +@- Exception vectors ( after cstartup execution ) +@------------------------------------ +@- These vectors are read at RAM address after the remap command is performed in +@- the EBI. As they will be relocated at address 0x0 to be effective, a +@- relative addressing is forbidden. The only possibility to get an absolute +@- addressing for an ARM vector is to read a PC relative value at a defined +@- offset. It is easy to reserve the locations 0x20 to 0x3C (the 8 next +@- vectors) for storing the absolute exception handler address. +@- The AIC vectoring access vectors are saved in the interrupt and fast +@- interrupt ARM vectors. So, only 5 offsets are required ( reserved vector +@- offset is never used). +@- The provisory handler addresses are defined on infinite loop and can be +@- modified at any time. +@- Note also that the reset is only accessible by a jump from the application +@- to 0. It is an actual software reset. +@- As the 13 first location are used by the vectors, the read/write link +@- address must be defined from 0x34 if internal data mapping is required. +@- (use for that the option -rw- base=0x34 +@------------------------------------------------------------------------------ + +VectorTable: + ldr pc, [pc, #0x18] @ SoftReset + ldr pc, [pc, #0x18] @ UndefHandler + ldr pc, [pc, #0x18] @ SWIHandler + ldr pc, [pc, #0x18] @ PrefetchAbortHandler + ldr pc, [pc, #0x18] @ DataAbortHandler + nop @ Reserved + ldr pc, [pc,#-0xF20] @ IRQ : read the AIC + ldr pc, [pc,#-0xF20] @ FIQ : read the AIC + +@- There are only 5 offsets as the vectoring is used. + .word _SoftReset + .word _UndefHandler +_SWIadress: + .word SWIHandler + .word _PrefetchAbortHandler + .word _DataAbortHandler + +@- Vectoring Execution function run at absolut addresss +_SoftReset: b _SoftReset +_UndefHandler: b _UndefHandler +_SWIHandler: b _SWIHandler +_PrefetchAbortHandler: b _PrefetchAbortHandler +_DataAbortHandler: b _DataAbortHandler + + + +InitTableEBI: + .word EBI_CSR_0 + .word EBI_CSR_1 + .word EBI_CSR_2 + .word EBI_CSR_3 + .word EBI_CSR_4 + .word EBI_CSR_5 + .word EBI_CSR_6 + .word EBI_CSR_7 + .word 0x00000001 @ REMAP command + .word 0x00000006 @ 6 memory regions, standard read +PtEBIBase: + .word EBI_BASE @ EBI Base Address + +@------------------------------------------------------------------------------ +@- The reset handler before Remap +@-------------------------------- +@- From here, the code is executed from SRAM address +@------------------------------------------------------------------------------ +InitReset: + +@------------------------------------------------------------------------------ +@- Speed up the Boot sequence +@---------------------------- +@- After reset, the number os wait states on chip select 0 is 8. All AT91 +@- Evaluation Boards fits fast flash memories, so that the number of wait +@- states can be optimized to fast up the boot sequence. +@- ICE note :For ICE debug no need to set the EBI value these values already set +@- by the boot function. +@------------------------------------------------------------------------------ +@- Load System EBI Base address and CSR0 Init Value + ldr r0, PtEBIBase + ldr r1, [pc,#-(8+.-InitTableEBI)] @ values (relative) + +@- Speed up code execution by disabling wait state on Chip Select 0 + str r1, [r0] + +@------------------------------------------------------------------------------ +@- low level init +@---------------- +@ Call __low_level_init to perform initialization before initializing +@ AIC and calling main. +@---------------------------------------------------------------------- + +@ bl __low_level_init + + +@------------------------------------------------------------------------------ +@- Reset the Interrupt Controller +@-------------------------------- +@- Normally, the code is executed only if a reset has been actually performed. +@- So, the AIC initialization resumes at setting up the default vectors. +@------------------------------------------------------------------------------ +@- Load the AIC Base Address and the default handler addresses + + add r0, pc,#-(8+.-AicData) @ @ where to read values (relative) + + ldmia r0, {r1-r4} + +@- Setup the Spurious Vector + str r4, [r1, #AIC_SPU] @ r4 = spurious handler + + +@- ICE note : For ICE debug +@- Perform 8 End Of Interrupt Command to make sure AIC will not lock out nIRQ + mov r0, #8 +LoopAic0: + str r1, [r1, #AIC_EOICR] @ any value written + subs r0, r0, #1 + bhi LoopAic0 + +@- Reset Interrupts + mov r0, #0 + sub r0, r0, #1 @ all bits set + str r0, [r1, #AIC_IDCR] + str r0, [r1, #AIC_ICCR] + +@- Set up the default interrupt handler vectors + str r2, [r1, #AIC_SVR] @ SVR[0] for FIQ + add r1, r1, #AIC_SVR + mov r0, #31 @ counter +LoopAic1: + str r3, [r1, r0, LSL #2] @ SVRs for IRQs + subs r0, r0, #1 @ do not save FIQ + bhi LoopAic1 + + b EndInitAic + +@- Default Interrupt Handlers +AicData: + .word AIC_BASE @ AIC Base Address +@------------------------------------------------------------------------------ +@- Default Interrupt Handler +@--------------------------- +@- These function are defined in the AT91 library. If you want to change this +@- you can redifine these function in your appication code +@------------------------------------------------------------------------------ + +@ IMPORT at91_default_fiq_handler +@ IMPORT at91_default_irq_handler +@ IMPORT at91_spurious_handler +PtDefaultHandler: + .word at91_default_fiq_handler + .word at91_default_irq_handler + .word at91_spurious_handler + +at91_default_fiq_handler: B at91_default_fiq_handler +at91_default_irq_handler: B at91_default_irq_handler +at91_spurious_handler: B at91_spurious_handler + +EndInitAic: + +@------------------------------------------------------------------------------ +@- Setup Exception Vectors in Internal RAM before Remap +@------------------------------------------------------ +@- That's important to perform this operation before Remap in order to guarantee' +@- that the core has valid vectors at any time during the remap operation. +@- Note: There are only 5 offsets as the vectoring is used. +@- ICE note : In this code only the start address value is changed if you use +@- without Semihosting. +@- Before Remap the internal RAM it's 0x300000' +@- After Remap the internal RAM it's 0x000000' +@- Remap it's already executed it's no possible to write to 0x300000. +@------------------------------------------------------------------------------ +@- Copy the ARM exception vectors + + + mov r0, #0x28 + add r1, pc,#-(8+.-Init_Vector) + str r1,[r0] + mov r0, #0x08 + add r1, pc,#-(8+.-VectorTable-8) + ldr r1,[r1] + str r1,[r0] + swi 0 +@ The RAM_BASE = 0 it's specific for ICE' + + RAM_BASE = 0 +Init_Vector: + mov r8, #RAM_BASE @ @ of the hard vector after remap in internal RAM 0x0 + + add r9, pc,#-(8+.-VectorTable) @ @ where to read values (relative) + ldmia r9!, {r0-r7} @ read 8 vectors + + stmia r8!, {r0-r7} @ store them + + ldmia r9!, {r0-r4} @ read 5 absolute handler addresses + stmia r8!, {r0-r4} @ store them + +@------------------------------------------------------------------------------ +@- Initialise the Memory Controller +@---------------------------------- +@- That's principaly the Remap Command. Actually, all the External Bus ' +@- Interface is configured with some instructions and the User Interface Image +@- as described above. The jump "mov pc, r12" could be unread as it is after +@- located after the Remap but actually it is thanks to the Arm core pipeline. +@- The IniTableEBI addressing must be relative . +@- The PtInitRemap must be absolute as the processor jumps at this address +@- immediatly after the Remap is performed. +@- Note also that the EBI base address is loaded in r11 by the "ldmia". +@- ICE note :For ICE debug these values already set by the boot function and the +@- Remap it's already executed it's no need to set still. +@------------------------------------------------------------------------------ +@- Copy the Image of the Memory Controller + sub r10, pc,#(8+.-InitTableEBI) @ get the address of the chip select register image + ldr r12, PtInitRemap @ get the real jump address ( after remap ) + +@- Copy Chip Select Register Image to Memory Controller and command remap + ldmia r10!, {r0-r9,r11} @ load the complete image and the EBI base + stmia r11!, {r0-r9} @ store the complete image with the remap command + +@- Jump to ROM at its new address + mov pc, r12 @ jump and break the pipeline + +PtInitRemap: + .word InitRemap @ address where to jump after REMAP + +@------------------------------------------------------------------------------ +@- The Reset Handler after Remap +@------------------------------- +@- From here, the code is continous execute from its link address. +@------------------------------------------------------------------------------ + +InitRemap: + +@-------------------------------- +@- ARM Core Mode and Status Bits +@-------------------------------- + +ARM_MODE_USER = 0x10 +ARM_MODE_FIQ = 0x11 +ARM_MODE_IRQ = 0x12 +ARM_MODE_SVC = 0x13 +ARM_MODE_ABORT = 0x17 +ARM_MODE_UNDEF = 0x1B +ARM_MODE_SYS = 0x1F + +I_BIT = 0x80 +F_BIT = 0x40 +T_BIT = 0x20 + +@------------------------------------------------------------------------------ +@- Stack Sizes Definition +@------------------------ +@- Interrupt Stack requires 3 words x 8 priority level x 4 bytes when using +@- the vectoring. This assume that the IRQ_ENTRY/IRQ_EXIT macro are used. +@- The Interrupt Stack must be adjusted depending on the interrupt handlers. +@- Fast Interrupt is the same than Interrupt without priority level. +@- Other stacks are defined by default to save one word each. +@- The System stack size is not defined and is limited by the free internal +@- SRAM. +@- User stack size is not defined and is limited by the free external SRAM. +@------------------------------------------------------------------------------ + +IRQ_STACK_SIZE = (3*8*4) @ 3 words per interrupt priority level +FIQ_STACK_SIZE = (3*4) @ 3 words +ABT_STACK_SIZE = (1*4) @ 1 word +UND_STACK_SIZE = (1*4) @ 1 word + +@------------------------------------------------------------------------------ +@- Top of Stack Definition +@------------------------- +@- Fast Interrupt, Interrupt, Abort, Undefined and Supervisor Stack are located +@- at the top of internal memory in order to speed the exception handling +@- context saving and restoring. +@- User (Application, C) Stack is located at the top of the external memory. +@------------------------------------------------------------------------------ +RAM_BASE = 0 +RAM_SIZE = (2*1024) +RAM_LIMIT = (RAM_BASE+RAM_SIZE) +EXT_SRAM_BASE = 0x02000000 +EXT_SRAM_SIZE = 0x00040000 @ 256Kbytes +EXT_SRAM_LIMIT = (EXT_SRAM_BASE+EXT_SRAM_SIZE) + +TOP_EXCEPTION_STACK = RAM_LIMIT @ Defined in part +TOP_APPLICATION_STACK = EXT_SRAM_LIMIT @ Defined in Target + +@------------------------------------------------------------------------------ +@- Setup the stack for each mode +@------------------------------- + ldr r0, =TOP_EXCEPTION_STACK + +@- Set up Fast Interrupt Mode and set FIQ Mode Stack + msr CPSR_c, #ARM_MODE_FIQ | I_BIT |F_BIT + mov r13, r0 @ Init stack FIQ + sub r0, r0, #FIQ_STACK_SIZE + +@- Set up Interrupt Mode and set IRQ Mode Stack + msr CPSR_c, #ARM_MODE_IRQ | I_BIT |F_BIT + mov r13, r0 @ Init stack IRQ + sub r0, r0, #IRQ_STACK_SIZE + +@- Set up Abort Mode and set Abort Mode Stack + msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT + mov r13, r0 @ Init stack Abort + sub r0, r0, #ABT_STACK_SIZE + +@- Set up Undefined Instruction Mode and set Undef Mode Stack + msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT + mov r13, r0 @ Init stack Undef + sub r0, r0, #UND_STACK_SIZE + +@- Set up Supervisor Mode and set Supervisor Mode Stack + msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT + mov r13, r0 @ Init stack Sup +@------------------------------------------------------------------------------ +@- Setup Application Operating Mode and Enable the interrupts +@------------------------------------------------------------ +@- System Mode is selected first and the stack is setup. This allows to prevent +@- any interrupt occurence while the User is not initialized. System Mode is +@- used as the interrupt enabling would be avoided from User Mode (CPSR cannot +@- be written while the core is in User Mode). +@------------------------------------------------------------------------------ + msr CPSR_c, #ARM_MODE_USER @ set User mode + ldr r13, =TOP_APPLICATION_STACK @ Init stack User + +@------------------------------------------------------------------------------ +@- Initialise C variables +@------------------------ +@- Following labels are automatically generated by the linker. +@- RO: Read-only = the code +@- RW: Read Write = the data pre-initialized and zero-initialized. +@- ZI: Zero-Initialized. +@- Pre-initialization values are located after the code area in the image. +@- Zero-initialized datas are mapped after the pre-initialized. +@- Note on the Data position : +@- If using the ARMSDT, when no -rw-base option is used for the linker, the +@- data area is mapped after the code. You can map the data either in internal +@- SRAM ( -rw-base=0x40 or 0x34) or in external SRAM ( -rw-base=0x2000000 ). +@- Note also that to improve the code density, the pre_initialized data must +@- be limited to a minimum. +@------------------------------------------------------------------------------ +@ IMPORT |Image$$RO$$Limit| @ End of ROM code (=start of ROM data) +@ IMPORT |Image$$RW$$Base| @ Base of RAM to initialise +@ IMPORT |Image$$ZI$$Base| @ Base and limit of area +@ IMPORT |Image$$ZI$$Limit| @ to zero initialise + +@ ldr r0, =|Image$$RO$$Limit| @ Get pointer to ROM data +@ ldr r1, =|Image$$RW$$Base| @ and RAM copy + ldr r3, = __bss_start__ @ Zero init base => top of initialised data +@ cmp r0, r1 @ Check that they are different +@ beq NoRW +@LoopRw: cmp r1, r3 @ Copy init data +@ ldrcc r2, [r0], #4 +@ strcc r2, [r1], #4 +@ bcc LoopRw +NoRW: ldr r1, = __bss_end__ @ Top of zero init segment + mov r2, #0 +LoopZI: cmp r3, r1 @ Zero init + strcc r2, [r3], #4 + bcc LoopZI + + + +@------------------------------------------------------------------------------ +@- Branch on C code Main function (with interworking) +@---------------------------------------------------- +@- Branch must be performed by an interworking call as either an ARM or Thumb +@- main C function must be supported. This makes the code not position- +@- independant. A Branch with link would generate errors +@------------------------------------------------------------------------------ +@ IMPORT main + + ldr r0, =main + mov lr, pc + bx r0 + +@------------------------------------------------------------------------------ +@- Loop for ever +@--------------- +@- End of application. Normally, never occur. +@- Could jump on Software Reset ( B 0x0 ). +@------------------------------------------------------------------------------ +End: + b End + + .END diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/boot/boot_flash.S b/Bachelor/Mikroprozessorsysteme2/mi2/boot/boot_flash.S new file mode 100644 index 0000000..bddc854 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/boot/boot_flash.S @@ -0,0 +1,384 @@ +@****************************************************************************** +@* boot.S fr AT91EB63 +@* Es wurde die +@* AT91 Assembler Code Startup Sequence for C Code Applications Software +@* als Vorlage genutzt. +@* von: Manfred Pester +@* vom: 17.12.2003 +@------------------------------------------------------------------------------ + +#include "../h/aic.inc" +#include "../h/ebi.inc" + +@------------------------------------------------------------------------------ +@- Area Definition +@----------------- +@- Must be defined as function to put first in the code as it must be mapped +@- at SRAM. +@------------------------------------------------------------------------------ + +.section .text +.code 32 + +.global _start +@****************************************************************************** +@* Einsprungpunkt wird wohl auch die Adresse 0 RESET sein +@****************************************************************************** +_start: + +Reset: B InitReset @ reset +undefvec: B undefvec @ Undefined Instruction +swivec: B swivec @ Software Interrupt +pabtvec: B pabtvec @ Prefetch Abort +dabtvec: B dabtvec @ Data Abort +rsvdvec: B rsvdvec @ reserved +irqvec: B irqvec @ reserved +fiqvec: B fiqvec @ reserved + + +InitTableEBI: + .word EBI_CSR_0 + .word EBI_CSR_1 + .word EBI_CSR_2 + .word EBI_CSR_3 + .word EBI_CSR_4 + .word EBI_CSR_5 + .word EBI_CSR_6 + .word EBI_CSR_7 + .word 0x00000001 @ REMAP command + .word 0x00000006 @ 6 memory regions, standard read +PtEBIBase: + .word EBI_BASE @ EBI Base Address + + + +@------------------------------------------------------------------------------ +@- The reset handler before Remap +@-------------------------------- +@- From here, the code is executed from SRAM address +@------------------------------------------------------------------------------ +InitReset: + +@------------------------------------------------------------------------------ +@- Speed up the Boot sequence +@---------------------------- +@- After reset, the number os wait states on chip select 0 is 8. All AT91 +@- Evaluation Boards fits fast flash memories, so that the number of wait +@- states can be optimized to fast up the boot sequence. +@- ICE note :For ICE debug no need to set the EBI value these values already set +@- by the boot function. +@------------------------------------------------------------------------------ +@- Load System EBI Base address and CSR0 Init Value + ldr r0, PtEBIBase + ldr r1, [pc,#-(8+.-InitTableEBI)] @ values (relative) + +@- Speed up code execution by disabling wait state on Chip Select 0 + str r1, [r0] + +@------------------------------------------------------------------------------ +@- low level init +@---------------- +@ Call __low_level_init to perform initialization before initializing +@ AIC and calling main. +@---------------------------------------------------------------------- + +@ bl __low_level_init + + +@------------------------------------------------------------------------------ +@- Reset the Interrupt Controller +@-------------------------------- +@- Normally, the code is executed only if a reset has been actually performed. +@- So, the AIC initialization resumes at setting up the default vectors. +@------------------------------------------------------------------------------ +@- Load the AIC Base Address and the default handler addresses + + add r0, pc,#-(8+.-AicData) @ @ where to read values (relative) + ldmia r0, {r1-r4} + +@- Setup the Spurious Vector + str r4, [r1, #AIC_SPU] @ r4 = spurious handler + + +@- Set up the default interrupt handler vectors + str r2, [r1, #AIC_SVR] @ SVR[0] for FIQ + add r1, r1, #AIC_SVR + mov r0, #31 @ counter +LoopAic1: + str r3, [r1, r0, LSL #2] @ SVRs for IRQs + subs r0, r0, #1 @ do not save FIQ + bhi LoopAic1 + + b EndInitAic + +@- Default Interrupt Handlers +AicData: + .word AIC_BASE @ AIC Base Address +@------------------------------------------------------------------------------ +@- Default Interrupt Handler +@--------------------------- +@- These function are defined in the AT91 library. If you want to change this +@- you can redifine these function in your appication code +@------------------------------------------------------------------------------ + +PtDefaultHandler: + .word at91_default_fiq_handler + .word at91_default_irq_handler + .word at91_spurious_handler + +at91_default_fiq_handler: B at91_default_fiq_handler +at91_default_irq_handler: B at91_default_irq_handler +at91_spurious_handler: B at91_spurious_handler + +EndInitAic: + + +@****************************************************************************** +@* Setup Exception Vectors in internal RAM before Remap +@****************************************************************************** + b SetupRamVectors + +VectorTable: + ldr pc, [pc, #0x18] @ SoftReset + ldr pc, [pc, #0x18] @ UndefHandler + ldr pc, [pc, #0x18] @ SWIHandler + ldr pc, [pc, #0x18] @ PrefetchAbortHandler + ldr pc, [pc, #0x18] @ DataAbortHandler + nop @ Reserved + ldr pc, [pc,#-0xF20] @ IRQ : read the AIC + ldr pc, [pc,#-0xF20] @ FIQ : read the AIC + +@* There are only 5 offsets as the vectoring is used. + .word _SoftReset + .word _UndefHandler +_SWIadress: + .word SWIHandler + .word _PrefetchAbortHandler + .word _DataAbortHandler + +@* Vectoring Execution function run at absolut addresss +_SoftReset: b _SoftReset +_UndefHandler: b _UndefHandler +_SWIHandler: b _SWIHandler +_PrefetchAbortHandler: b _PrefetchAbortHandler +_DataAbortHandler: b _DataAbortHandler + +@------------------------------------------------------------------------------ +@- Setup Exception Vectors in Internal RAM before Remap +@------------------------------------------------------ +@- That's important to perform this operation before Remap in order to guarantee +@- that the core has valid vectors at any time during the remap operation. +@- Note: There are only 5 offsets as the vectoring is used. +@- ICE note : In this code only the start address value is changed if you use +@- without Semihosting. +@- Before Remap the internal RAM it's 0x300000 +@- After Remap the internal RAM it's 0x000000 +@- Remap it's already executed it's no possible to write to 0x300000. +@------------------------------------------------------------------------------ +@- Copy the ARM exception vectors + +RAM_BASE: + .word 0x300000 +SetupRamVectors: +@ mov r8, #RAM_BASE @ @ of the hard vector after remap in internal RAM 0x0 + ldr r8, [pc,#-(8+.-RAM_BASE)] @ values (relative) + + add r9, pc,#-(8+.-VectorTable) @ @ where to read values (relative) + ldmia r9!, {r0-r7} @ read 8 vectors + stmia r8!, {r0-r7} @ store them + + ldmia r9!, {r0-r4} @ read 5 absolute handler addresses + stmia r8!, {r0-r4} @ store them + +@* The RAM_BASE = 0x300000 it's specific for Boot from Flash + + RAM_BASE = 0x300000 + +@------------------------------------------------------------------------------ +@- Initialise the Memory Controller +@---------------------------------- +@- That's principaly the Remap Command. Actually, all the External Bus +@- Interface is configured with some instructions and the User Interface Image +@- as described above. The jump "mov pc, r12" could be unread as it is after +@- located after the Remap but actually it is thanks to the Arm core pipeline. +@- The IniTableEBI addressing must be relative . +@- The PtInitRemap must be absolute as the processor jumps at this address +@- immediatly after the Remap is performed. +@- Note also that the EBI base address is loaded in r11 by the "ldmia". +@- ICE note :For ICE debug these values already set by the boot function and the +@- Remap it's already executed it's no need to set still. +@------------------------------------------------------------------------------ +@- Copy the Image of the Memory Controller + sub r10, pc,#(8+.-InitTableEBI) @ get the address of the chip select register image + ldr r12, PtInitRemap @ get the real jump address ( after remap ) + +@- Copy Chip Select Register Image to Memory Controller and command remap + ldmia r10!, {r0-r9,r11} @ load the complete image and the EBI base + stmia r11!, {r0-r9} @ store the complete image with the remap command + +@- Jump to ROM at its new address + mov pc, r12 @ jump and break the pipeline + +PtInitRemap: + .word InitRemap @ address where to jump after REMAP + +@------------------------------------------------------------------------------ +@- The Reset Handler after Remap +@------------------------------- +@- From here, the code is continous execute from its link address. +@------------------------------------------------------------------------------ + +InitRemap: + +@-------------------------------- +@- ARM Core Mode and Status Bits +@-------------------------------- + +ARM_MODE_USER = 0x10 +ARM_MODE_FIQ = 0x11 +ARM_MODE_IRQ = 0x12 +ARM_MODE_SVC = 0x13 +ARM_MODE_ABORT = 0x17 +ARM_MODE_UNDEF = 0x1B +ARM_MODE_SYS = 0x1F + +I_BIT = 0x80 +F_BIT = 0x40 +T_BIT = 0x20 + +@------------------------------------------------------------------------------ +@- Stack Sizes Definition +@------------------------ +@- Interrupt Stack requires 3 words x 8 priority level x 4 bytes when using +@- the vectoring. This assume that the IRQ_ENTRY/IRQ_EXIT macro are used. +@- The Interrupt Stack must be adjusted depending on the interrupt handlers. +@- Fast Interrupt is the same than Interrupt without priority level. +@- Other stacks are defined by default to save one word each. +@- The System stack size is not defined and is limited by the free internal +@- SRAM. +@- User stack size is not defined and is limited by the free external SRAM. +@------------------------------------------------------------------------------ + +IRQ_STACK_SIZE = (3*8*4) @ 3 words per interrupt priority level +FIQ_STACK_SIZE = (3*4) @ 3 words +ABT_STACK_SIZE = (1*4) @ 1 word +UND_STACK_SIZE = (1*4) @ 1 word + +@------------------------------------------------------------------------------ +@- Top of Stack Definition +@------------------------- +@- Fast Interrupt, Interrupt, Abort, Undefined and Supervisor Stack are located +@- at the top of internal memory in order to speed the exception handling +@- context saving and restoring. +@- User (Application, C) Stack is located at the top of the external memory. +@------------------------------------------------------------------------------ +RAM_BASE = 0 +RAM_SIZE = (2*1024) +RAM_LIMIT = (RAM_BASE+RAM_SIZE) +EXT_SRAM_BASE = 0x02000000 +EXT_SRAM_SIZE = 0x00040000 @ 256Kbytes +EXT_SRAM_LIMIT = (EXT_SRAM_BASE+EXT_SRAM_SIZE) + +TOP_EXCEPTION_STACK = RAM_LIMIT @ Defined in part +TOP_APPLICATION_STACK = EXT_SRAM_LIMIT @ Defined in Target + +@------------------------------------------------------------------------------ +@- Setup the stack for each mode +@------------------------------- + ldr r0, =TOP_EXCEPTION_STACK + +@- Set up Fast Interrupt Mode and set FIQ Mode Stack + msr CPSR_c, #ARM_MODE_FIQ | I_BIT |F_BIT + mov r13, r0 @ Init stack FIQ + sub r0, r0, #FIQ_STACK_SIZE + +@- Set up Interrupt Mode and set IRQ Mode Stack + msr CPSR_c, #ARM_MODE_IRQ | I_BIT |F_BIT + mov r13, r0 @ Init stack IRQ + sub r0, r0, #IRQ_STACK_SIZE + +@- Set up Abort Mode and set Abort Mode Stack + msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT + mov r13, r0 @ Init stack Abort + sub r0, r0, #ABT_STACK_SIZE + +@- Set up Undefined Instruction Mode and set Undef Mode Stack + msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT + mov r13, r0 @ Init stack Undef + sub r0, r0, #UND_STACK_SIZE + +@- Set up Supervisor Mode and set Supervisor Mode Stack + msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT + mov r13, r0 @ Init stack Sup +@------------------------------------------------------------------------------ +@- Setup Application Operating Mode and Enable the interrupts +@------------------------------------------------------------ +@- System Mode is selected first and the stack is setup. This allows to prevent +@- any interrupt occurence while the User is not initialized. System Mode is +@- used as the interrupt enabling would be avoided from User Mode (CPSR cannot +@- be written while the core is in User Mode). +@------------------------------------------------------------------------------ + msr CPSR_c, #ARM_MODE_USER @ set User mode + ldr r13, =TOP_APPLICATION_STACK @ Init stack User + +@------------------------------------------------------------------------------ +@- Initialise C variables +@------------------------ +@- Following labels are automatically generated by the linker. +@- RO: Read-only = the code +@- RW: Read Write = the data pre-initialized and zero-initialized. +@- ZI: Zero-Initialized. +@- Pre-initialization values are located after the code area in the image. +@- Zero-initialized datas are mapped after the pre-initialized. +@- Note on the Data position : +@- If using the ARMSDT, when no -rw-base option is used for the linker, the +@- data area is mapped after the code. You can map the data either in internal +@- SRAM ( -rw-base=0x40 or 0x34) or in external SRAM ( -rw-base=0x2000000 ). +@- Note also that to improve the code density, the pre_initialized data must +@- be limited to a minimum. +@------------------------------------------------------------------------------ +@ IMPORT |Image$$RO$$Limit| @ End of ROM code (=start of ROM data) +@ IMPORT |Image$$RW$$Base| @ Base of RAM to initialise +@ IMPORT |Image$$ZI$$Base| @ Base and limit of area +@ IMPORT |Image$$ZI$$Limit| @ to zero initialise + +@ ldr r0, =|Image$$RO$$Limit| @ Get pointer to ROM data +@ ldr r1, =|Image$$RW$$Base| @ and RAM copy + ldr r3, = __bss_start__ @ Zero init base => top of initialised data +@ cmp r0, r1 @ Check that they are different +@ beq NoRW +@LoopRw: cmp r1, r3 @ Copy init data +@ ldrcc r2, [r0], #4 +@ strcc r2, [r1], #4 +@ bcc LoopRw +NoRW: ldr r1, = __bss_end__ @ Top of zero init segment + mov r2, #0 +LoopZI: cmp r3, r1 @ Zero init + strcc r2, [r3], #4 + bcc LoopZI + + + +@------------------------------------------------------------------------------ +@- Branch on C code Main function (with interworking) +@---------------------------------------------------- +@- Branch must be performed by an interworking call as either an ARM or Thumb +@- main C function must be supported. This makes the code not position- +@- independant. A Branch with link would generate errors +@------------------------------------------------------------------------------ +@ IMPORT main + + ldr r0, =main + mov lr, pc + bx r0 + +@------------------------------------------------------------------------------ +@- Loop for ever +@--------------- +@- End of application. Normally, never occur. +@- Could jump on Software Reset ( B 0x0 ). +@------------------------------------------------------------------------------ +End: + b End + + .END diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/boot/boot_ice.S b/Bachelor/Mikroprozessorsysteme2/mi2/boot/boot_ice.S new file mode 100644 index 0000000..2703ace --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/boot/boot_ice.S @@ -0,0 +1,457 @@ +@------------------------------------------------------------------------------ +@- ATMEL Microcontroller Software Support - ROUSSET - +@------------------------------------------------------------------------------ +@ The software is delivered "AS IS" without warranty or condition of any +@ kind, either express, implied or statutory. This includes without +@ limitation any warranty or condition with respect to merchantability or +@ fitness for any particular purpose, or against the infringements of +@ intellectual property rights of others. +@----------------------------------------------------------------------------- +@- File source : cstartup_ice.sboot.S +@- Object : Boot for simulate Final Application version to be +@- loaded in SRAM. Only change as the internal RAM address +@- and support the Semihosting +@- Compilation flag : SEMIHOSTING => use the semihosting facilities +@- +@- 1.0 17/09/02 GR : Creation +@------------------------------------------------------------------------------ + +#include "aic.inc" +#include "ebi.inc" + +@------------------------------------------------------------------------------ +@- Area Definition +@----------------- +@- Must be defined as function to put first in the code as it must be mapped +@- at SRAM. +@------------------------------------------------------------------------------ + + .text + +@------------------------------------------------------------------------------ +@- Semihosting support +@-------------------------------- +@- The C runtime library is the IO functions provided by the semihosting. +@- They are generally costly in code and can be used as the debugger mode (ICE) +@------------------------------------------------------------------------------ +@- Define "__main" to ensure that C runtime system is not linked + + .global _start +@------------------------------------------------------------------------------ +@- Define the entry point +@------------------------ +@- Note on the link address and the Remap command. +@- In order to guarantee that the non position-independant code (the ARM linker +@- armlink doesn't generate position-independant code) can work on the ARM, +@- it must be linked at address at which it expects to run. +@- In this startup example, we use RAM as base address. +@------------------------------------------------------------------------------ +_start: + +@------------------------------------------------------------------------------ +@- Exception vectors +@-------------------- +@- In the ICE function your board as run the boot code and initialize the remap +@- feature. but these code it's location independant and can be emulate the csartup_fash +@- fonctionnality. +@- These vectors are read at RAM address. in Flash mode these vectors are at 0 +@- They absolutely requires to be in relative addresssing mode in order to +@- guarantee a valid jump. For the moment, all are just looping (what may be +@- dangerous in a final system). If an exception occurs before remap, this +@- would result in an infinite loop. +@------------------------------------------------------------------------------ + +Reset: B InitReset @ reset +undefvec: B undefvec @ Undefined Instruction +swivec: B swivec @ Software Interrupt +pabtvec: B pabtvec @ Prefetch Abort +dabtvec: B dabtvec @ Data Abort +rsvdvec: B rsvdvec @ reserved +irqvec: B irqvec @ reserved +fiqvec: B fiqvec @ reserved + +@------------------------------------------------------------------------------ +@- Exception vectors ( after cstartup execution ) +@------------------------------------ +@- These vectors are read at RAM address after the remap command is performed in +@- the EBI. As they will be relocated at address 0x0 to be effective, a +@- relative addressing is forbidden. The only possibility to get an absolute +@- addressing for an ARM vector is to read a PC relative value at a defined +@- offset. It is easy to reserve the locations 0x20 to 0x3C (the 8 next +@- vectors) for storing the absolute exception handler address. +@- The AIC vectoring access vectors are saved in the interrupt and fast +@- interrupt ARM vectors. So, only 5 offsets are required ( reserved vector +@- offset is never used). +@- The provisory handler addresses are defined on infinite loop and can be +@- modified at any time. +@- Note also that the reset is only accessible by a jump from the application +@- to 0. It is an actual software reset. +@- As the 13 first location are used by the vectors, the read/write link +@- address must be defined from 0x34 if internal data mapping is required. +@- (use for that the option -rw- base=0x34 +@------------------------------------------------------------------------------ + +VectorTable: + ldr pc, [pc, #0x18] @ SoftReset + ldr pc, [pc, #0x18] @ UndefHandler + ldr pc, [pc, #0x18] @ SWIHandler + ldr pc, [pc, #0x18] @ PrefetchAbortHandler + ldr pc, [pc, #0x18] @ DataAbortHandler + nop @ Reserved + ldr pc, [pc,#-0xF20] @ IRQ : read the AIC + ldr pc, [pc,#-0xF20] @ FIQ : read the AIC + +@- There are only 5 offsets as the vectoring is used. + .word _SoftReset + .word _UndefHandler +_SWIadress: + .word SWIHandler + .word _PrefetchAbortHandler + .word _DataAbortHandler + +@- Vectoring Execution function run at absolut addresss +_SoftReset: b _SoftReset +_UndefHandler: b _UndefHandler +_SWIHandler: b _SWIHandler +_PrefetchAbortHandler: b _PrefetchAbortHandler +_DataAbortHandler: b _DataAbortHandler + + + +InitTableEBI: + .word EBI_CSR_0 + .word EBI_CSR_1 + .word EBI_CSR_2 + .word EBI_CSR_3 + .word EBI_CSR_4 + .word EBI_CSR_5 + .word EBI_CSR_6 + .word EBI_CSR_7 + .word 0x00000001 @ REMAP command + .word 0x00000006 @ 6 memory regions, standard read +PtEBIBase: + .word EBI_BASE @ EBI Base Address + +@------------------------------------------------------------------------------ +@- The reset handler before Remap +@-------------------------------- +@- From here, the code is executed from SRAM address +@------------------------------------------------------------------------------ +InitReset: + +@------------------------------------------------------------------------------ +@- Speed up the Boot sequence +@---------------------------- +@- After reset, the number os wait states on chip select 0 is 8. All AT91 +@- Evaluation Boards fits fast flash memories, so that the number of wait +@- states can be optimized to fast up the boot sequence. +@- ICE note :For ICE debug no need to set the EBI value these values already set +@- by the boot function. +@------------------------------------------------------------------------------ +@- Load System EBI Base address and CSR0 Init Value + ldr r0, PtEBIBase + ldr r1, [pc,#-(8+.-InitTableEBI)] @ values (relative) + +@- Speed up code execution by disabling wait state on Chip Select 0 + str r1, [r0] + +@------------------------------------------------------------------------------ +@- low level init +@---------------- +@ Call __low_level_init to perform initialization before initializing +@ AIC and calling main. +@---------------------------------------------------------------------- + +@ bl __low_level_init + + +@------------------------------------------------------------------------------ +@- Reset the Interrupt Controller +@-------------------------------- +@- Normally, the code is executed only if a reset has been actually performed. +@- So, the AIC initialization resumes at setting up the default vectors. +@------------------------------------------------------------------------------ +@- Load the AIC Base Address and the default handler addresses + + add r0, pc,#-(8+.-AicData) @ @ where to read values (relative) + + ldmia r0, {r1-r4} + +@- Setup the Spurious Vector + str r4, [r1, #AIC_SPU] @ r4 = spurious handler + + +@- ICE note : For ICE debug +@- Perform 8 End Of Interrupt Command to make sure AIC will not lock out nIRQ + mov r0, #8 +LoopAic0: + str r1, [r1, #AIC_EOICR] @ any value written + subs r0, r0, #1 + bhi LoopAic0 + +@- Reset Interrupts + mov r0, #0 + sub r0, r0, #1 @ all bits set + str r0, [r1, #AIC_IDCR] + str r0, [r1, #AIC_ICCR] + +@- Set up the default interrupt handler vectors + str r2, [r1, #AIC_SVR] @ SVR[0] for FIQ + add r1, r1, #AIC_SVR + mov r0, #31 @ counter +LoopAic1: + str r3, [r1, r0, LSL #2] @ SVRs for IRQs + subs r0, r0, #1 @ do not save FIQ + bhi LoopAic1 + + b EndInitAic + +@- Default Interrupt Handlers +AicData: + .word AIC_BASE @ AIC Base Address +@------------------------------------------------------------------------------ +@- Default Interrupt Handler +@--------------------------- +@- These function are defined in the AT91 library. If you want to change this +@- you can redifine these function in your appication code +@------------------------------------------------------------------------------ + +@ IMPORT at91_default_fiq_handler +@ IMPORT at91_default_irq_handler +@ IMPORT at91_spurious_handler +PtDefaultHandler: + .word at91_default_fiq_handler + .word at91_default_irq_handler + .word at91_spurious_handler + +at91_default_fiq_handler: B at91_default_fiq_handler +at91_default_irq_handler: B at91_default_irq_handler +at91_spurious_handler: B at91_spurious_handler + +EndInitAic: + +@------------------------------------------------------------------------------ +@- Setup Exception Vectors in Internal RAM before Remap +@------------------------------------------------------ +@- That's important to perform this operation before Remap in order to guarantee +@- that the core has valid vectors at any time during the remap operation. +@- Note: There are only 5 offsets as the vectoring is used. +@- ICE note : In this code only the start address value is changed if you use +@- without Semihosting. +@- Before Remap the internal RAM it's 0x300000 +@- After Remap the internal RAM it's 0x000000 +@- Remap it's already executed it's no possible to write to 0x300000. +@------------------------------------------------------------------------------ +@- Copy the ARM exception vectors + + + mov r0, #0x28 + add r1, pc,#-(8+.-Init_Vector) + str r1,[r0] + mov r0, #0x08 + add r1, pc,#-(8+.-VectorTable-8) + ldr r1,[r1] + str r1,[r0] + swi 0 +@ The RAM_BASE = 0 it's specific for ICE + + RAM_BASE = 0 +Init_Vector: + mov r8, #RAM_BASE @ @ of the hard vector after remap in internal RAM 0x0 + + add r9, pc,#-(8+.-VectorTable) @ @ where to read values (relative) + ldmia r9!, {r0-r7} @ read 8 vectors + + stmia r8!, {r0-r7} @ store them + + ldmia r9!, {r0-r4} @ read 5 absolute handler addresses + stmia r8!, {r0-r4} @ store them + +@------------------------------------------------------------------------------ +@- Initialise the Memory Controller +@---------------------------------- +@- That's principaly the Remap Command. Actually, all the External Bus +@- Interface is configured with some instructions and the User Interface Image +@- as described above. The jump "mov pc, r12" could be unread as it is after +@- located after the Remap but actually it is thanks to the Arm core pipeline. +@- The IniTableEBI addressing must be relative . +@- The PtInitRemap must be absolute as the processor jumps at this address +@- immediatly after the Remap is performed. +@- Note also that the EBI base address is loaded in r11 by the "ldmia". +@- ICE note :For ICE debug these values already set by the boot function and the +@- Remap it's already executed it's no need to set still. +@------------------------------------------------------------------------------ +@- Copy the Image of the Memory Controller + sub r10, pc,#(8+.-InitTableEBI) @ get the address of the chip select register image + ldr r12, PtInitRemap @ get the real jump address ( after remap ) + +@- Copy Chip Select Register Image to Memory Controller and command remap + ldmia r10!, {r0-r9,r11} @ load the complete image and the EBI base + stmia r11!, {r0-r9} @ store the complete image with the remap command + +@- Jump to ROM at its new address + mov pc, r12 @ jump and break the pipeline + +PtInitRemap: + .word InitRemap @ address where to jump after REMAP + +@------------------------------------------------------------------------------ +@- The Reset Handler after Remap +@------------------------------- +@- From here, the code is continous execute from its link address. +@------------------------------------------------------------------------------ + +InitRemap: + +@-------------------------------- +@- ARM Core Mode and Status Bits +@-------------------------------- + +ARM_MODE_USER = 0x10 +ARM_MODE_FIQ = 0x11 +ARM_MODE_IRQ = 0x12 +ARM_MODE_SVC = 0x13 +ARM_MODE_ABORT = 0x17 +ARM_MODE_UNDEF = 0x1B +ARM_MODE_SYS = 0x1F + +I_BIT = 0x80 +F_BIT = 0x40 +T_BIT = 0x20 + +@------------------------------------------------------------------------------ +@- Stack Sizes Definition +@------------------------ +@- Interrupt Stack requires 3 words x 8 priority level x 4 bytes when using +@- the vectoring. This assume that the IRQ_ENTRY/IRQ_EXIT macro are used. +@- The Interrupt Stack must be adjusted depending on the interrupt handlers. +@- Fast Interrupt is the same than Interrupt without priority level. +@- Other stacks are defined by default to save one word each. +@- The System stack size is not defined and is limited by the free internal +@- SRAM. +@- User stack size is not defined and is limited by the free external SRAM. +@------------------------------------------------------------------------------ + +IRQ_STACK_SIZE = (3*8*4) @ 3 words per interrupt priority level +FIQ_STACK_SIZE = (3*4) @ 3 words +ABT_STACK_SIZE = (1*4) @ 1 word +UND_STACK_SIZE = (1*4) @ 1 word + +@------------------------------------------------------------------------------ +@- Top of Stack Definition +@------------------------- +@- Fast Interrupt, Interrupt, Abort, Undefined and Supervisor Stack are located +@- at the top of internal memory in order to speed the exception handling +@- context saving and restoring. +@- User (Application, C) Stack is located at the top of the external memory. +@------------------------------------------------------------------------------ +RAM_BASE = 0 +RAM_SIZE = (2*1024) +RAM_LIMIT = (RAM_BASE+RAM_SIZE) +EXT_SRAM_BASE = 0x02000000 +EXT_SRAM_SIZE = 0x00040000 @ 256Kbytes +EXT_SRAM_LIMIT = (EXT_SRAM_BASE+EXT_SRAM_SIZE) + +TOP_EXCEPTION_STACK = RAM_LIMIT @ Defined in part +TOP_APPLICATION_STACK = EXT_SRAM_LIMIT @ Defined in Target + +@------------------------------------------------------------------------------ +@- Setup the stack for each mode +@------------------------------- + ldr r0, =TOP_EXCEPTION_STACK + +@- Set up Fast Interrupt Mode and set FIQ Mode Stack + msr CPSR_c, #ARM_MODE_FIQ | I_BIT |F_BIT + mov r13, r0 @ Init stack FIQ + sub r0, r0, #FIQ_STACK_SIZE + +@- Set up Interrupt Mode and set IRQ Mode Stack + msr CPSR_c, #ARM_MODE_IRQ | I_BIT |F_BIT + mov r13, r0 @ Init stack IRQ + sub r0, r0, #IRQ_STACK_SIZE + +@- Set up Abort Mode and set Abort Mode Stack + msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT + mov r13, r0 @ Init stack Abort + sub r0, r0, #ABT_STACK_SIZE + +@- Set up Undefined Instruction Mode and set Undef Mode Stack + msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT + mov r13, r0 @ Init stack Undef + sub r0, r0, #UND_STACK_SIZE + +@- Set up Supervisor Mode and set Supervisor Mode Stack + msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT + mov r13, r0 @ Init stack Sup +@------------------------------------------------------------------------------ +@- Setup Application Operating Mode and Enable the interrupts +@------------------------------------------------------------ +@- System Mode is selected first and the stack is setup. This allows to prevent +@- any interrupt occurence while the User is not initialized. System Mode is +@- used as the interrupt enabling would be avoided from User Mode (CPSR cannot +@- be written while the core is in User Mode). +@------------------------------------------------------------------------------ + msr CPSR_c, #ARM_MODE_USER @ set User mode + ldr r13, =TOP_APPLICATION_STACK @ Init stack User + +@------------------------------------------------------------------------------ +@- Initialise C variables +@------------------------ +@- Following labels are automatically generated by the linker. +@- RO: Read-only = the code +@- RW: Read Write = the data pre-initialized and zero-initialized. +@- ZI: Zero-Initialized. +@- Pre-initialization values are located after the code area in the image. +@- Zero-initialized datas are mapped after the pre-initialized. +@- Note on the Data position : +@- If using the ARMSDT, when no -rw-base option is used for the linker, the +@- data area is mapped after the code. You can map the data either in internal +@- SRAM ( -rw-base=0x40 or 0x34) or in external SRAM ( -rw-base=0x2000000 ). +@- Note also that to improve the code density, the pre_initialized data must +@- be limited to a minimum. +@------------------------------------------------------------------------------ +@ IMPORT |Image$$RO$$Limit| @ End of ROM code (=start of ROM data) +@ IMPORT |Image$$RW$$Base| @ Base of RAM to initialise +@ IMPORT |Image$$ZI$$Base| @ Base and limit of area +@ IMPORT |Image$$ZI$$Limit| @ to zero initialise + +@ ldr r0, =|Image$$RO$$Limit| @ Get pointer to ROM data +@ ldr r1, =|Image$$RW$$Base| @ and RAM copy + ldr r3, = __bss_start__ @ Zero init base => top of initialised data +@ cmp r0, r1 @ Check that they are different +@ beq NoRW +@LoopRw: cmp r1, r3 @ Copy init data +@ ldrcc r2, [r0], #4 +@ strcc r2, [r1], #4 +@ bcc LoopRw +NoRW: ldr r1, = __bss_end__ @ Top of zero init segment + mov r2, #0 +LoopZI: cmp r3, r1 @ Zero init + strcc r2, [r3], #4 + bcc LoopZI + + + +@------------------------------------------------------------------------------ +@- Branch on C code Main function (with interworking) +@---------------------------------------------------- +@- Branch must be performed by an interworking call as either an ARM or Thumb +@- main C function must be supported. This makes the code not position- +@- independant. A Branch with link would generate errors +@------------------------------------------------------------------------------ +@ IMPORT main + + ldr r0, =main + mov lr, pc + bx r0 + +@------------------------------------------------------------------------------ +@- Loop for ever +@--------------- +@- End of application. Normally, never occur. +@- Could jump on Software Reset ( B 0x0 ). +@------------------------------------------------------------------------------ +End: + b End + + .END diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/boot/c_startup.s b/Bachelor/Mikroprozessorsysteme2/mi2/boot/c_startup.s new file mode 100644 index 0000000..2e2d3ec --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/boot/c_startup.s @@ -0,0 +1,514 @@ +@------------------------------------------------------------------------------
+@- ATMEL Microcontroller Software Support - ROUSSET -
+@------------------------------------------------------------------------------
+@ The software is delivered "AS IS" without warranty or condition of any
+@ kind, either express, implied or statutory. This includes without
+@ limitation any warranty or condition with respect to merchantability or
+@ fitness for any particular purpose, or against the infringements of
+@ intellectual property rights of others.
+@-----------------------------------------------------------------------------
+@- File source : cstartup_ice.s
+@- Object : Boot for simulate Final Application version to be
+@- loaded in SRAM. Only change as the internal RAM address
+@- and support the Semihosting
+@- Compilation flag : SEMIHOSTING => use the semihosting facilities
+@-
+@- 1.0 06/04/00 JPP : Creation
+@- 1.1 18/08/00 JCZ : Over-comment and optimize
+@- 1.2 25/10/00 JPP : Global for including
+@------------------------------------------------------------------------------
+
+@------------------------------------------------------------------------------
+@- Area Definition
+@-----------------
+@- Must be defined as function to put first in the code as it must be mapped
+@- at SRAM.
+@------------------------------------------------------------------------------
+@ .section reset, CODE, READONLY, INTERWORK
+
+@------------------------------------------------------------------------------
+@- Semihosting support
+@--------------------------------
+@- The C runtime library is the IO functions provided by the semihosting.
+@- They are generally costly in code and can be used as the debugger mode (ICE)
+@------------------------------------------------------------------------------
+@- Define "__main" to ensure that C runtime system is not linked
+@ EXPORT __main
+.global __gccmain
+.global _start
+@------------------------------------------------------------------------------
+@- Define the entry point
+@------------------------
+@- Note on the link address and the Remap command.
+@- In order to guarantee that the non position-independant code (the ARM linker
+@- armlink doesn't generate position-independant code) can work on the ARM,
+@- it must be linked at address at which it expects to run.
+@- In this startup example, we use RAM as base address.
+@------------------------------------------------------------------------------
+_start:
+
+@------------------------------------------------------------------------------
+@- Exception vectors
+@--------------------
+@- In the ICE function your board as run the boot code and initialize the remap
+@- feature. but these code it's location independant and can be emulate the csartup_fash
+@- fonctionnality.
+@- These vectors are read at RAM address. in Flash mode these vectors are at 0
+@- They absolutely requires to be in relative addresssing mode in order to
+@- guarantee a valid jump. For the moment, all are just looping (what may be
+@- dangerous in a final system). If an exception occurs before remap, this
+@- would result in an infinite loop.
+@------------------------------------------------------------------------------
+Reset: B InitReset @ reset
+undefvec: B undefvec @ Undefined Instruction
+swivec: B swivec @ Software Interrupt
+pabtvec: B pabtvec @ Prefetch Abort
+dabtvec: B dabtvec @ Data Abort
+rsvdvec: B rsvdvec @ reserved
+irqvec: B irqvec @ reserved
+fiqvec: B fiqvec @ reserved
+
+@------------------------------------------------------------------------------
+@- Exception vectors ( after cstartup execution )
+@------------------------------------
+@- These vectors are read at RAM address after the remap command is performed in
+@- the EBI. As they will be relocated at address 0x0 to be effective, a
+@- relative addressing is forbidden. The only possibility to get an absolute
+@- addressing for an ARM vector is to read a PC relative value at a defined
+@- offset. It is easy to reserve the locations 0x20 to 0x3C (the 8 next
+@- vectors) for storing the absolute exception handler address.
+@- The AIC vectoring access vectors are saved in the interrupt and fast
+@- interrupt ARM vectors. So, only 5 offsets are required ( reserved vector
+@- offset is never used).
+@- The provisory handler addresses are defined on infinite loop and can be
+@- modified at any time.
+@- Note also that the reset is only accessible by a jump from the application
+@- to 0. It is an actual software reset.
+@- As the 13 first location are used by the vectors, the read/write link
+@- address must be defined from 0x34 if internal data mapping is required.
+@- (use for that the option -rw- base=0x34
+@------------------------------------------------------------------------------
+VectorTable:
+ ldr pc, [pc, #0x18] @ SoftReset
+ ldr pc, [pc, #0x18] @ UndefHandler
+ ldr pc, [pc, #0x18] @ SWIHandler
+ ldr pc, [pc, #0x18] @ PrefetchAbortHandler
+ ldr pc, [pc, #0x18] @ DataAbortHandler
+ nop @ Reserved
+ ldr pc, [pc,#-0xF20] @ IRQ : read the AIC
+ ldr pc, [pc,#-0xF20] @ FIQ : read the AIC
+
+@- There are only 5 offsets as the vectoring is used.
+ .word SoftReset
+ .word UndefHandler
+ .word SWIHandler
+ .word PrefetchAbortHandler
+ .word DataAbortHandler
+
+@- Vectoring Execution function run at absolut addresss
+SoftReset: b SoftReset
+UndefHandler: b UndefHandler
+SWIHandler: b SWIHandler
+PrefetchAbortHandler: b PrefetchAbortHandler
+DataAbortHandler: b DataAbortHandler
+
+@------------------------------------------------------------------------------
+@- EBI Initialization Data
+@-------------------------
+@- The EBI values depend to target choice , Clock, and memories access time.
+@- Yous must be define these values in include file
+@- The EBI User Interface Image which is copied by the boot.
+@- The EBI_CSR_x are defined in the target and hardware depend.
+@- That's hardware! Details in the Electrical Datasheet of the AT91 device.
+@- EBI Base Address is added at the end for commodity in copy code.
+@- ICE note :For ICE debug no need to set the EBI value these values already set
+@- by the boot function.
+@------------------------------------------------------------------------------
+FLASH_BASE = 0x1000000
+EXT_SRAM_BASE = 0x2000000
+EBI_BASE = 0xFFE00000 @- External Bus Interface
+
+EBI_CSR_0 = (FLASH_BASE | 0x2529) @ 0x01000000, 16MB, 2 tdf, 16 bits, 2 WS
+EBI_CSR_1 = (EXT_SRAM_BASE | 0x2121) @ 0x02000000, 16MB, 0 hold, 16 bits, 1 WS
+EBI_CSR_2 = 0x20000000 @ unused
+EBI_CSR_3 = 0x30000000 @ unused
+EBI_CSR_4 = 0x40000000 @ unused
+EBI_CSR_5 = 0x50000000 @ unused
+EBI_CSR_6 = 0x60000000 @ unused
+EBI_CSR_7 = 0x70000000 @ unused
+
+InitTableEBI:
+ .word EBI_CSR_0
+ .word EBI_CSR_1
+ .word EBI_CSR_2
+ .word EBI_CSR_3
+ .word EBI_CSR_4
+ .word EBI_CSR_5
+ .word EBI_CSR_6
+ .word EBI_CSR_7
+ .word 0x00000001 @ REMAP command
+ .word 0x00000006 @ 6 memory regions, standard read
+PtEBIBase:
+ .word EBI_BASE @ EBI Base Address
+
+@------------------------------------------------------------------------------
+@- The reset handler before Remap
+@--------------------------------
+@- From here, the code is executed from SRAM address
+@------------------------------------------------------------------------------
+InitReset:
+
+@------------------------------------------------------------------------------
+@- Speed up the Boot sequence
+@----------------------------
+@- After reset, the number os wait states on chip select 0 is 8. All AT91
+@- Evaluation Boards fits fast flash memories, so that the number of wait
+@- states can be optimized to fast up the boot sequence.
+@- ICE note :For ICE debug no need to set the EBI value these values already set
+@- by the boot function.
+@------------------------------------------------------------------------------
+@- Load System EBI Base address and CSR0 Init Value
+ ldr r0, PtEBIBase
+ ldr r1, [pc,#-(8+.-InitTableEBI)] @ values (relative)
+
+@- Speed up code execution by disabling wait state on Chip Select 0
+ str r1, [r0]
+
+@------------------------------------------------------------------------------
+@- low level init
+@----------------
+@ Call __low_level_init to perform initialization before initializing
+@ AIC and calling main.
+@----------------------------------------------------------------------
+
+@ bl __low_level_init
+
+@------------------------------------------
+@- AIC User Interface Structure Definition
+@------------------------------------------
+
+AIC_SMR = 0 @- Source Mode Register
+AIC_SVR = 0x80 @- Source Vector Register
+AIC_IVR = 0x100 @- IRQ Vector Register
+AIC_FVR = 0x104 @- FIQ Vector Register
+AIC_ISR = 0x108 @- Interrupt Status Register
+AIC_IPR = 0x10c @- Interrupt Pending Register
+AIC_IMR = 0x110 @- Interrupt Mask Register
+AIC_CISR = 0x114 @- Core Interrupt Status Register
+@ = 0x118 @- Reserved 0
+@ = 0x11c @- Reserved 1
+AIC_IECR = 0x120 @- Interrupt Enable Command Register
+AIC_IDCR = 0x124 @- Interrupt Disable Command Register
+AIC_ICCR = 0x128 @- Interrupt Clear Command Register
+AIC_ISCR = 0x12c @- Interrupt Set Command Register
+AIC_EOICR = 0x130 @- of Interrupt Command Register
+AIC_SPU = 0x134 @- Spurious Vector Register
+
+@---------------------------------------------
+@- AIC_SMR[]: Interrupt Source Mode Registers
+@---------------------------------------------
+
+AIC_PRIOR = 0x07 @- Priority
+
+AIC_SRCTYPE = 0x60 @- Source Type Definition
+AIC_SRCTYPE_INT_LEVEL_SENSITIVE = 0x00 @- Level Sensitive
+AIC_SRCTYPE_INT_EDGE_TRIGGERED = 0x20 @- Edge Triggered
+AIC_SRCTYPE_EXT_LOW_LEVEL = 0x00 @- Low Level
+AIC_SRCTYPE_EXT_NEGATIVE_EDGE = 0x20 @- Negative Edge
+AIC_SRCTYPE_EXT_HIGH_LEVEL = 0x40 @- High Level
+AIC_SRCTYPE_EXT_POSITIVE_EDGE = 0x60 @- Positive Edge
+
+@--------------------------------------
+@- AIC_ISR: Interrupt Status Register
+@--------------------------------------
+
+AIC_IRQID = 0x1F @- Current source interrupt
+
+@-------------------------------------------
+@- AIC_CISR: Interrupt Core Status Register
+@-------------------------------------------
+
+AIC_NFIQ = 0x01 @- Core FIQ Status
+AIC_NIRQ = 0x02 @- Core IRQ Status
+
+@--------------------------------------------
+@- Advanced Interrupt COntroller BAse Address
+@--------------------------------------------
+
+AIC_BASE = 0xFFFFF000
+
+@------------------------------------------------------------------------------
+@- Reset the Interrupt Controller
+@--------------------------------
+@- Normally, the code is executed only if a reset has been actually performed.
+@- So, the AIC initialization resumes at setting up the default vectors.
+@------------------------------------------------------------------------------
+@- Load the AIC Base Address and the default handler addresses
+ add r0, pc,#-(8+.-AicData) @ @ where to read values (relative)
+
+ ldmia r0, {r1-r4}
+
+@- Setup the Spurious Vector
+ str r4, [r1, #AIC_SPU] @ r4 = spurious handler
+
+
+@- ICE note : For ICE debug
+@- Perform 8 End Of Interrupt Command to make sure AIC will not lock out nIRQ
+ mov r0, #8
+LoopAic0:
+ str r1, [r1, #AIC_EOICR] @ any value written
+ subs r0, r0, #1
+ bhi LoopAic0
+
+@- Set up the default interrupt handler vectors
+ str r2, [r1, #AIC_SVR] @ SVR[0] for FIQ
+ add r1, r1, #AIC_SVR
+ mov r0, #31 @ counter
+LoopAic1:
+ str r3, [r1, r0, LSL #2] @ SVRs for IRQs
+ subs r0, r0, #1 @ do not save FIQ
+ bhi LoopAic1
+
+ b EndInitAic
+
+@- Default Interrupt Handlers
+AicData:
+ .word AIC_BASE @ AIC Base Address
+@------------------------------------------------------------------------------
+@- Default Interrupt Handler
+@---------------------------
+@- These function are defined in the AT91 library. If you want to change this
+@- you can redifine these function in your appication code
+@------------------------------------------------------------------------------
+
+@ IMPORT at91_default_fiq_handler
+@ IMPORT at91_default_irq_handler
+@ IMPORT at91_spurious_handler
+PtDefaultHandler:
+ .word at91_default_fiq_handler
+ .word at91_default_irq_handler
+ .word at91_spurious_handler
+
+at91_default_fiq_handler: B at91_default_fiq_handler
+at91_default_irq_handler: B at91_default_irq_handler
+at91_spurious_handler: B at91_spurious_handler
+
+EndInitAic:
+
+@------------------------------------------------------------------------------
+@- Setup Exception Vectors in Internal RAM before Remap
+@------------------------------------------------------
+@- That's important to perform this operation before Remap in order to guarantee
+@- that the core has valid vectors at any time during the remap operation.
+@- Note: There are only 5 offsets as the vectoring is used.
+@- ICE note : In this code only the start address value is changed if you use
+@- without Semihosting.
+@- Before Remap the internal RAM it's 0x300000
+@- After Remap the internal RAM it's 0x000000
+@- Remap it's already executed it's no possible to write to 0x300000.
+@------------------------------------------------------------------------------
+@- Copy the ARM exception vectors
+
+@ The RAM_BASE = 0 it's specific for ICE
+
+ RAM_BASE = 0
+
+ mov r8,#RAM_BASE @ @ of the hard vector after remap in internal RAM 0x0
+
+ add r9, pc,#-(8+.-VectorTable) @ @ where to read values (relative)
+ ldmia r9!, {r0-r7} @ read 8 vectors
+
+ stmia r8!, {r0-r7} @ store them
+
+ ldmia r9!, {r0-r4} @ read 5 absolute handler addresses
+ stmia r8!, {r0-r4} @ store them
+
+@------------------------------------------------------------------------------
+@- Initialise the Memory Controller
+@----------------------------------
+@- That's principaly the Remap Command. Actually, all the External Bus
+@- Interface is configured with some instructions and the User Interface Image
+@- as described above. The jump "mov pc, r12" could be unread as it is after
+@- located after the Remap but actually it is thanks to the Arm core pipeline.
+@- The IniTableEBI addressing must be relative .
+@- The PtInitRemap must be absolute as the processor jumps at this address
+@- immediatly after the Remap is performed.
+@- Note also that the EBI base address is loaded in r11 by the "ldmia".
+@- ICE note :For ICE debug these values already set by the boot function and the
+@- Remap it's already executed it's no need to set still.
+@------------------------------------------------------------------------------
+@- Copy the Image of the Memory Controller
+ sub r10, pc,#(8+.-InitTableEBI) @ get the address of the chip select register image
+ ldr r12, PtInitRemap @ get the real jump address ( after remap )
+
+@- Copy Chip Select Register Image to Memory Controller and command remap
+ ldmia r10!, {r0-r9,r11} @ load the complete image and the EBI base
+ stmia r11!, {r0-r9} @ store the complete image with the remap command
+
+@- Jump to ROM at its new address
+ mov pc, r12 @ jump and break the pipeline
+
+PtInitRemap:
+ .word InitRemap @ address where to jump after REMAP
+
+@------------------------------------------------------------------------------
+@- The Reset Handler after Remap
+@-------------------------------
+@- From here, the code is continous execute from its link address.
+@------------------------------------------------------------------------------
+InitRemap:
+
+
+@--------------------------------
+@- ARM Core Mode and Status Bits
+@--------------------------------
+
+ARM_MODE_USER = 0x10
+ARM_MODE_FIQ = 0x11
+ARM_MODE_IRQ = 0x12
+ARM_MODE_SVC = 0x13
+ARM_MODE_ABORT = 0x17
+ARM_MODE_UNDEF = 0x1B
+ARM_MODE_SYS = 0x1F
+
+I_BIT = 0x80
+F_BIT = 0x40
+T_BIT = 0x20
+
+@------------------------------------------------------------------------------
+@- Stack Sizes Definition
+@------------------------
+@- Interrupt Stack requires 3 words x 8 priority level x 4 bytes when using
+@- the vectoring. This assume that the IRQ_ENTRY/IRQ_EXIT macro are used.
+@- The Interrupt Stack must be adjusted depending on the interrupt handlers.
+@- Fast Interrupt is the same than Interrupt without priority level.
+@- Other stacks are defined by default to save one word each.
+@- The System stack size is not defined and is limited by the free internal
+@- SRAM.
+@- User stack size is not defined and is limited by the free external SRAM.
+@------------------------------------------------------------------------------
+
+IRQ_STACK_SIZE = (3*8*4) @ 3 words per interrupt priority level
+FIQ_STACK_SIZE = (3*4) @ 3 words
+ABT_STACK_SIZE = (1*4) @ 1 word
+UND_STACK_SIZE = (1*4) @ 1 word
+
+@------------------------------------------------------------------------------
+@- Top of Stack Definition
+@-------------------------
+@- Fast Interrupt, Interrupt, Abort, Undefined and Supervisor Stack are located
+@- at the top of internal memory in order to speed the exception handling
+@- context saving and restoring.
+@- User (Application, C) Stack is located at the top of the external memory.
+@------------------------------------------------------------------------------
+RAM_BASE = 0
+RAM_SIZE = (2*1024)
+RAM_LIMIT = (RAM_BASE+RAM_SIZE)
+EXT_SRAM_BASE = 0x02000000
+EXT_SRAM_SIZE = 0x00040000 @ 256Kbytes
+EXT_SRAM_LIMIT = (EXT_SRAM_BASE+EXT_SRAM_SIZE)
+
+TOP_EXCEPTION_STACK = RAM_LIMIT @ Defined in part
+TOP_APPLICATION_STACK = EXT_SRAM_LIMIT @ Defined in Target
+
+@------------------------------------------------------------------------------
+@- Setup the stack for each mode
+@-------------------------------
+ ldr r0, =TOP_EXCEPTION_STACK
+
+@- Set up Fast Interrupt Mode and set FIQ Mode Stack
+ msr CPSR_c, #ARM_MODE_FIQ | I_BIT |F_BIT
+ mov r13, r0 @ Init stack FIQ
+ sub r0, r0, #FIQ_STACK_SIZE
+
+@- Set up Interrupt Mode and set IRQ Mode Stack
+ msr CPSR_c, #ARM_MODE_IRQ | I_BIT |F_BIT
+ mov r13, r0 @ Init stack IRQ
+ sub r0, r0, #IRQ_STACK_SIZE
+
+@- Set up Abort Mode and set Abort Mode Stack
+ msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT
+ mov r13, r0 @ Init stack Abort
+ sub r0, r0, #ABT_STACK_SIZE
+
+@- Set up Undefined Instruction Mode and set Undef Mode Stack
+ msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT
+ mov r13, r0 @ Init stack Undef
+ sub r0, r0, #UND_STACK_SIZE
+
+@- Set up Supervisor Mode and set Supervisor Mode Stack
+ msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT
+ mov r13, r0 @ Init stack Sup
+
+@------------------------------------------------------------------------------
+@- Setup Application Operating Mode and Enable the interrupts
+@------------------------------------------------------------
+@- System Mode is selected first and the stack is setup. This allows to prevent
+@- any interrupt occurence while the User is not initialized. System Mode is
+@- used as the interrupt enabling would be avoided from User Mode (CPSR cannot
+@- be written while the core is in User Mode).
+@------------------------------------------------------------------------------
+ msr CPSR_c, #ARM_MODE_USER @ set User mode
+ ldr r13, =TOP_APPLICATION_STACK @ Init stack User
+
+@------------------------------------------------------------------------------
+@- Initialise C variables
+@------------------------
+@- Following labels are automatically generated by the linker.
+@- RO: Read-only = the code
+@- RW: Read Write = the data pre-initialized and zero-initialized.
+@- ZI: Zero-Initialized.
+@- Pre-initialization values are located after the code area in the image.
+@- Zero-initialized datas are mapped after the pre-initialized.
+@- Note on the Data position :
+@- If using the ARMSDT, when no -rw-base option is used for the linker, the
+@- data area is mapped after the code. You can map the data either in internal
+@- SRAM ( -rw-base=0x40 or 0x34) or in external SRAM ( -rw-base=0x2000000 ).
+@- Note also that to improve the code density, the pre_initialized data must
+@- be limited to a minimum.
+@------------------------------------------------------------------------------
+@ IMPORT |Image$$RO$$Limit| @ End of ROM code (=start of ROM data)
+@ IMPORT |Image$$RW$$Base| @ Base of RAM to initialise
+@ IMPORT |Image$$ZI$$Base| @ Base and limit of area
+@ IMPORT |Image$$ZI$$Limit| @ to zero initialise
+
+@ ldr r0, =|Image$$RO$$Limit| @ Get pointer to ROM data
+@ ldr r1, =|Image$$RW$$Base| @ and RAM copy
+@ ldr r3, =|Image$$ZI$$Base| @ Zero init base => top of initialised data
+@ cmp r0, r1 @ Check that they are different
+@ beq NoRW
+@LoopRw: cmp r1, r3 @ Copy init data
+@ ldrcc r2, [r0], #4
+@ strcc r2, [r1], #4
+@ bcc LoopRw
+@NoRW: ldr r1, =|Image$$ZI$$Limit| @ Top of zero init segment
+@ mov r2, #0
+@LoopZI: cmp r3, r1 @ Zero init
+@ strcc r2, [r3], #4
+@ bcc LoopZI
+
+
+
+@------------------------------------------------------------------------------
+@- Branch on C code Main function (with interworking)
+@----------------------------------------------------
+@- Branch must be performed by an interworking call as either an ARM or Thumb
+@- main C function must be supported. This makes the code not position-
+@- independant. A Branch with link would generate errors
+@------------------------------------------------------------------------------
+@ IMPORT main
+
+ ldr r0, =main
+ mov lr, pc
+ bx r0
+
+@------------------------------------------------------------------------------
+@- Loop for ever
+@---------------
+@- End of application. Normally, never occur.
+@- Could jump on Software Reset ( B 0x0 ).
+@------------------------------------------------------------------------------
+End:
+ b End
+
+ .END
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/boot/ebi.inc b/Bachelor/Mikroprozessorsysteme2/mi2/boot/ebi.inc new file mode 100644 index 0000000..c4287f0 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/boot/ebi.inc @@ -0,0 +1,25 @@ +@------------------------------------------------------------------------------ +@- EBI Initialization Data +@------------------------- +@- The EBI values depend to target choice , Clock, and memories access time. +@- Yous must be define these values in include file +@- The EBI User Interface Image which is copied by the boot. +@- The EBI_CSR_x are defined in the target and hardware depend. +@- That's hardware! Details in the Electrical Datasheet of the AT91 device. +@- EBI Base Address is added at the end for commodity in copy code. +@- ICE note :For ICE debug no need to set the EBI value these values already set +@- by the boot function. +@------------------------------------------------------------------------------ +FLASH_BASE = 0x1000000 +EXT_SRAM_BASE = 0x2000000 +EBI_BASE = 0xFFE00000 @- External Bus Interface + +EBI_CSR_0 = (FLASH_BASE | 0x2529) @ 0x01000000, 16MB, 2 tdf, 16 bits, 2 WS +EBI_CSR_1 = (EXT_SRAM_BASE | 0x2121) @ 0x02000000, 16MB, 0 hold, 16 bits, 1 WS +EBI_CSR_2 = 0x20000000 @ unused +EBI_CSR_3 = 0x30000000 @ unused +EBI_CSR_4 = 0x40000000 @ unused +EBI_CSR_5 = 0x50000000 @ unused +EBI_CSR_6 = 0x60000000 @ unused +EBI_CSR_7 = 0x70000000 @ unused + diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/boot/swi.S b/Bachelor/Mikroprozessorsysteme2/mi2/boot/swi.S new file mode 100644 index 0000000..6a4f2e3 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/boot/swi.S @@ -0,0 +1,12 @@ + .global SWIHandler + .text +SWIHandler: + + movs pc, lr + +SWIJumpTable: + +.end + + + diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/Termin2Aufgabe2.c b/Bachelor/Mikroprozessorsysteme2/mi2/h/Termin2Aufgabe2.c new file mode 100644 index 0000000..24171af --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/Termin2Aufgabe2.c @@ -0,0 +1,35 @@ +// Lsung zu Termin2 +// Aufgabe 1 +// von: Manfred Pester +// vom: 27.07.2003 +// + +#define PIOB_PER ((volatile unsigned int *) 0xFFFF0000) +#define PIOB_OER ((volatile unsigned int *) 0xFFFF0010) +#define PIOB_SODR ((volatile unsigned int *) 0xFFFF0030) +#define PIOB_CODR ((volatile unsigned int *) 0xFFFF0034) + +#define PMC_SCER ((volatile unsigned int *) 0xFFFF4000) +#define PMC_SCDR ((volatile unsigned int *) 0xFFFF4004) +#define PMC_SCSR ((volatile unsigned int *) 0xFFFF4008) +#define PMC_PCER ((volatile unsigned int *) 0xFFFF4010) +#define PMC_PCDR ((volatile unsigned int *) 0xFFFF4014) +#define PMC_PCSR ((volatile unsigned int *) 0xFFFF4018) + + +int main(void) +{ + + *PMC_PCER = 0x4000; // Peripheral Clock fr PIOB einschalten + + *PIOB_PER = 0x0100; // Enable Register 8 LED's und Taster an PB3 + *PIOB_OER = 0x0100; // Output Enable Register 8 LED's sind aus + + while(1) + { + *PIOB_SODR = 0x0100; // Set Output Data Register LED's sind aus + *PIOB_CODR = 0x0100; // Clear Output Data Register LED's leuchten + } + + return 0; +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/Termin2Aufgabe2.h b/Bachelor/Mikroprozessorsysteme2/mi2/h/Termin2Aufgabe2.h new file mode 100644 index 0000000..670a0a9 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/Termin2Aufgabe2.h @@ -0,0 +1,38 @@ +// Headerfile fr Termin2 + +#ifndef Termin2 +#define Termin2 + +// Register von PIOB +#define PIOB_PER ((volatile unsigned int *) 0xFFFF0000) +#define PIOB_OER ((volatile unsigned int *) 0xFFFF0010) +#define PIOB_SODR ((volatile unsigned int *) 0xFFFF0030) +#define PIOB_CODR ((volatile unsigned int *) 0xFFFF0034) +#define PIOB_PDSR ((volatile unsigned int *) 0xFFFF003C) + +// Leuchtdioden des AT91EB63 +#define LED1 0x0100 // PIOB8 +#define LED2 0x0200 // PIOB9 +#define LED3 0x0400 // PIOB10 +#define LED4 0x0800 // PIOB11 +#define LED5 0x1000 // PIOB12 +#define LED6 0x2000 // PIOB13 +#define LED7 0x4000 // PIOB14 +#define LED8 0x8000 // PIOB15 +// Taster SW1-3 an PIOB des AT91EB63 +#define SW1 0x08 // PIOB3 +#define SW2 0x10 // PIOB4 +#define SW3 0x20 // PIOB5 +// Taster SW4 an PIOA des AT91EB63 +#define SW4 0x200 // PIOA9 + + +// Register vom PMC +#define PMC_SCER ((volatile unsigned int *) 0xFFFF4000) +#define PMC_SCDR ((volatile unsigned int *) 0xFFFF4004) +#define PMC_SCSR ((volatile unsigned int *) 0xFFFF4008) +#define PMC_PCER ((volatile unsigned int *) 0xFFFF4010) +#define PMC_PCDR ((volatile unsigned int *) 0xFFFF4014) +#define PMC_PCSR ((volatile unsigned int *) 0xFFFF4018) + +#endif // Termin2 diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/aic.h b/Bachelor/Mikroprozessorsysteme2/mi2/h/aic.h new file mode 100644 index 0000000..8a5d2bd --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/aic.h @@ -0,0 +1,99 @@ +//---------------------------------------------------------------------------- +// File Name : aic.h +// Object : Advanced Interrupt Controller Definition File. +// +// 1.0 27/10/02 GR : Creation +//---------------------------------------------------------------------------- + +#ifndef aic_h +#define aic_h + +#include "std_c.h" + +/*-----------------------------------------*/ +/* AIC User Interface Structure Definition */ +/*-----------------------------------------*/ + +typedef struct +{ + at91_reg AIC_SMR[32] ; /* Source Mode Register */ + at91_reg AIC_SVR[32] ; /* Source Vector Register */ + at91_reg AIC_IVR ; /* IRQ Vector Register */ + at91_reg AIC_FVR ; /* FIQ Vector Register */ + at91_reg AIC_ISR ; /* Interrupt Status Register */ + at91_reg AIC_IPR ; /* Interrupt Pending Register */ + at91_reg AIC_IMR ; /* Interrupt Mask Register */ + at91_reg AIC_CISR ; /* Core Interrupt Status Register */ + at91_reg reserved0 ; + at91_reg reserved1 ; + at91_reg AIC_IECR ; /* Interrupt Enable Command Register */ + at91_reg AIC_IDCR ; /* Interrupt Disable Command Register */ + at91_reg AIC_ICCR ; /* Interrupt Clear Command Register */ + at91_reg AIC_ISCR ; /* Interrupt Set Command Register */ + at91_reg AIC_EOICR ; /* End of Interrupt Command Register */ + at91_reg AIC_SPU ; /* Spurious Vector Register */ +} StructAIC ; + +/*--------------------------------------------*/ +/* AIC_SMR[]: Interrupt Source Mode Registers */ +/*--------------------------------------------*/ + +#define AIC_PRIOR 0x07 /* Priority */ + +#define AIC_SRCTYPE 0x60 /* Source Type Definition */ + +/* Internal Interrupts */ +#define AIC_SRCTYPE_INT_LEVEL_SENSITIVE 0x00 /* Level Sensitive */ +#define AIC_SRCTYPE_INT_EDGE_TRIGGERED 0x20 /* Edge Triggered */ + +/* External Interrupts */ +#define AIC_SRCTYPE_EXT_LOW_LEVEL 0x00 /* Low Level */ +#define AIC_SRCTYPE_EXT_NEGATIVE_EDGE 0x20 /* Negative Edge */ +#define AIC_SRCTYPE_EXT_HIGH_LEVEL 0x40 /* High Level */ +#define AIC_SRCTYPE_EXT_POSITIVE_EDGE 0x60 /* Positive Edge */ + +/*------------------------------------*/ +/* AIC_ISR: Interrupt Status Register */ +/*------------------------------------*/ + +#define AIC_IRQID 0x1F /* Current source interrupt */ + +/*------------------------------------------*/ +/* AIC_CISR: Interrupt Core Status Register */ +/*------------------------------------------*/ + +#define AIC_NFIQ 0x01 /* Core FIQ Status */ +#define AIC_NIRQ 0x02 /* Core IRQ Status */ + +/*-------------------------------------*/ +/* Peripheral and Interrupt Identifier */ +/*-------------------------------------*/ + +#define FIQ_ID 0 /* Fast Interrupt */ +#define SWIRQ_ID 1 /* Soft Interrupt (generated by the AIC) */ +#define US0_ID 2 /* USART Channel 0 */ +#define US1_ID 3 /* USART Channel 1 */ +#define US2_ID 4 /* USART Channel 2 */ +#define SPI_ID 5 /* SPI */ +#define TC0_ID 6 /* Timer Channel 0 */ +#define TC1_ID 7 /* Timer Channel 1 */ +#define TC2_ID 8 /* Timer Channel 2 */ +#define TC3_ID 9 /* Timer Channel 3 */ +#define TC4_ID 10 /* Timer Channel 4 */ +#define TC5_ID 11 /* Timer Channel 5 */ +#define WD_ID 12 /* Watchdog */ +#define PIOA_ID 13 /* Parallel I/O Controller A */ +#define PIOB_ID 14 /* Parallel I/O Controller B */ + +#define IRQ3_ID 28 /* External interrupt 3 */ +#define IRQ2_ID 29 /* External interrupt 2 */ +#define IRQ1_ID 30 /* External interrupt 1 */ +#define IRQ0_ID 31 /* External interrupt 0 */ + +/*-------------------------------*/ +/* Advanced Interrupt Controller */ +/*-------------------------------*/ + +#define AIC_BASE ((StructAIC *)0xFFFFF000) + +#endif /* aic_h */ diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/aic.inc b/Bachelor/Mikroprozessorsysteme2/mi2/h/aic.inc new file mode 100644 index 0000000..6638c20 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/aic.inc @@ -0,0 +1,66 @@ +@---------------------------------------------------------------------------- +@ File Name : aic.inc +@ Object : Advanced Interrupt Controller Header File. +@ +@ 1.0 27/20/02 GR : Creation +@---------------------------------------------------------------------------- + +#ifndef pmc_inc +#define pmc_inc + +@------------------------------------------ +@- AIC User Interface Structure Definition +@------------------------------------------ + +AIC_SMR = 0 @- Source Mode Register +AIC_SVR = 0x80 @- Source Vector Register +AIC_IVR = 0x100 @- IRQ Vector Register +AIC_FVR = 0x104 @- FIQ Vector Register +AIC_ISR = 0x108 @- Interrupt Status Register +AIC_IPR = 0x10c @- Interrupt Pending Register +AIC_IMR = 0x110 @- Interrupt Mask Register +AIC_CISR = 0x114 @- Core Interrupt Status Register +@ = 0x118 @- Reserved 0 +@ = 0x11c @- Reserved 1 +AIC_IECR = 0x120 @- Interrupt Enable Command Register +AIC_IDCR = 0x124 @- Interrupt Disable Command Register +AIC_ICCR = 0x128 @- Interrupt Clear Command Register +AIC_ISCR = 0x12c @- Interrupt Set Command Register +AIC_EOICR = 0x130 @- of Interrupt Command Register +AIC_SPU = 0x134 @- Spurious Vector Register + +@--------------------------------------------- +@- AIC_SMR[]: Interrupt Source Mode Registers +@--------------------------------------------- + +AIC_PRIOR = 0x07 @- Priority + +AIC_SRCTYPE = 0x60 @- Source Type Definition +AIC_SRCTYPE_INT_LEVEL_SENSITIVE = 0x00 @- Level Sensitive +AIC_SRCTYPE_INT_EDGE_TRIGGERED = 0x20 @- Edge Triggered +AIC_SRCTYPE_EXT_LOW_LEVEL = 0x00 @- Low Level +AIC_SRCTYPE_EXT_NEGATIVE_EDGE = 0x20 @- Negative Edge +AIC_SRCTYPE_EXT_HIGH_LEVEL = 0x40 @- High Level +AIC_SRCTYPE_EXT_POSITIVE_EDGE = 0x60 @- Positive Edge + +@-------------------------------------- +@- AIC_ISR: Interrupt Status Register +@-------------------------------------- + +AIC_IRQID = 0x1F @- Current source interrupt + +@------------------------------------------- +@- AIC_CISR: Interrupt Core Status Register +@------------------------------------------- + +AIC_NFIQ = 0x01 @- Core FIQ Status +AIC_NIRQ = 0x02 @- Core IRQ Status + +@-------------------------------------------- +@- Advanced Interrupt COntroller BAse Address +@-------------------------------------------- + +AIC_BASE = 0xFFFFF000 + +#endif + diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/ebi.inc b/Bachelor/Mikroprozessorsysteme2/mi2/h/ebi.inc new file mode 100644 index 0000000..d9ac97d --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/ebi.inc @@ -0,0 +1,36 @@ +@---------------------------------------------------------------------------- +@ File Name : ebi.inc +@ Object : Power Management Controller Header File. +@ +@ 1.0 27/10/02 GR : Creation +@---------------------------------------------------------------------------- + +#ifndef ebi_inc +#define ebi_inc + +@------------------------------------------------------------------------------ +@- EBI Initialization Data +@------------------------- +@- The EBI values depend to target choice , Clock, and memories access time. +@- Yous must be define these values in include file +@- The EBI User Interface Image which is copied by the boot. +@- The EBI_CSR_x are defined in the target and hardware depend. +@- That's hardware! Details in the Electrical Datasheet of the AT91 device. +@- EBI Base Address is added at the end for commodity in copy code. +@- ICE note :For ICE debug no need to set the EBI value these values already set +@- by the boot function. +@------------------------------------------------------------------------------ +FLASH_BASE = 0x1000000 +EXT_SRAM_BASE = 0x2000000 +EBI_BASE = 0xFFE00000 @- External Bus Interface + +EBI_CSR_0 = (FLASH_BASE | 0x2529) @ 0x01000000, 16MB, 2 tdf, 16 bits, 2 WS +EBI_CSR_1 = (EXT_SRAM_BASE | 0x2121) @ 0x02000000, 16MB, 0 hold, 16 bits, 1 WS +EBI_CSR_2 = 0x20000000 @ unused +EBI_CSR_3 = 0x30000000 @ unused +EBI_CSR_4 = 0x40000000 @ unused +EBI_CSR_5 = 0x50000000 @ unused +EBI_CSR_6 = 0x60000000 @ unused +EBI_CSR_7 = 0x70000000 @ unused + +#endif diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/pio.h b/Bachelor/Mikroprozessorsysteme2/mi2/h/pio.h new file mode 100644 index 0000000..b95084c --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/pio.h @@ -0,0 +1,123 @@ +//---------------------------------------------------------------------------- +// File Name : pio.h +// Object : Parallel I/O Header File +// +//* 1.0 27/10/02 GR : Creation +//---------------------------------------------------------------------------- + +#ifndef pio_h +#define pio_h + +#include "std_c.h" + +/*------------------------------------------------------------*/ +/* User Interface Parallel I/O Interface Structure Definition */ +/*------------------------------------------------------------*/ + +typedef struct +{ + at91_reg PIO_PER ; /* PIO Enable Register */ + at91_reg PIO_PDR ; /* PIO Disable Register */ + at91_reg PIO_PSR ; /* PIO Status Register */ + at91_reg Reserved0 ; + at91_reg PIO_OER ; /* Output Enable Register */ + at91_reg PIO_ODR ; /* Output Disable Register */ + at91_reg PIO_OSR ; /* Output Status Register */ + at91_reg Reserved1 ; + at91_reg PIO_IFER ; /* Input Filter Enable Register */ + at91_reg PIO_IFDR ; /* Input Filter Disable Register */ + at91_reg PIO_IFSR ; /* Input Filter Status Register */ + at91_reg Reserved2 ; + at91_reg PIO_SODR ; /* Set Output Data Register */ + at91_reg PIO_CODR ; /* Clear Output Data Register */ + at91_reg PIO_ODSR ; /* Output Data Status Register */ + at91_reg PIO_PDSR ; /* Pin Data Status Register */ + at91_reg PIO_IER ; /* Interrupt Enable Register */ + at91_reg PIO_IDR ; /* Interrupt Disable Register */ + at91_reg PIO_IMR ; /* Interrupt Mask Register */ + at91_reg PIO_ISR ; /* Interrupt Status Register */ + at91_reg PIO_MDER ; /* Multi Driver Enable Register */ + at91_reg PIO_MDDR ; /* Multi Driver Disable Register */ + at91_reg PIO_MDSR ; /* Multi Driver Status Register */ +} StructPIO ; + +#define PIOB_BASE ((StructPIO *) 0xFFFF0000) /* Parallel I/O Controller B */ +#define PIOA_BASE ((StructPIO *) 0xFFFEC000) /* Parallel I/O Controller A */ + +/* PIO Controller A */ +#define PIOTCLK3 0 /* Timer 3 Clock signal */ +#define PIOTIOA3 1 /* Timer 3 Signal A */ +#define PIOTIOB3 2 /* Timer 3 Signal B */ + +#define PIOTCLK4 3 /* Timer 4 Clock signal */ +#define PIOTIOA4 4 /* Timer 4 Signal A */ +#define PIOTIOB4 5 /* Timer 4 Signal B */ + +#define PIOTCLK5 6 /* Timer 5 Clock signal */ +#define PIOTIOA5 7 /* Timer 5 Signal A */ +#define PIOTIOB5 8 /* Timer 5 Signal B */ + +#define PIOIRQ0 9 /* External Interrupt 0 */ +#define PIOIRQ1 10 /* External Interrupt 1 */ +#define PIOIRQ2 11 /* External Interrupt 2 */ +#define PIOIRQ3 12 /* External Interrupt 3 */ +#define PIOFIQ 13 /* Fast Interrupt */ + +#define PIOSCK0 14 /* USART 0 signal */ +#define PIOTXD0 15 /* USART 0 transmit data */ +#define PIORXD0 16 /* USART 0 receive data */ + +#define PIOSCK1 17 /* USART 1 clock signal */ +#define PIOTXD1 18 /* USART 1 transmit data */ +#define PIORXD1 19 /* USART 1 receive data */ + +#define PIOSCK2 20 /* USART 2 clock signal */ +#define PIOTXD2 21 /* USART 2 transmit data */ +#define PIORXD2 22 /* USART 2 receive data */ + +#define PIOSPCK 23 /* SPI clock signal */ +#define PIOMISO 24 /* SPI Master In Slave */ +#define PIOMOSI 25 /* SPI Master Out Slave */ +#define PIONPCS0 26 /* SPI Peripheral Chip Select 0 */ +#define PIONSS PIONPCS0 +#define PIONPCS1 27 /* SPI Peripheral Chip Select 1 */ +#define PIONPCS2 28 /* SPI Peripheral Chip Select 2 */ +#define PIONPCS3 29 /* SPI Peripheral Chip Select 3 */ + +/* PIO Controller B */ +#define PIOTCLK0 19 /* Timer 0 Clock signal input */ +#define PIOTIOA0 20 /* Timer 0 Signal A */ +#define PIOTIOB0 21 /* Timer 0 Signal B */ + +#define PIOTCLK1 22 /* Timer 1 Clock signal */ +#define PIOTIOA1 23 /* Timer 1 Signal A */ +#define PIOTIOB1 24 /* Timer 1 Signal B */ + +#define PIOTCLK2 25 /* Timer 2 Clock signal */ +#define PIOTIOA2 26 /* Timer 2 Signal A */ +#define PIOTIOB2 27 /* Timer 2 Signal B */ + +#define PIOMCKO 17 /* Master Clock Output */ + +#define PIOBMS 18 /* Boot Mode Select */ + +#define PIOMPI_NOE 0 /* MPI output enable */ +#define PIOMPI_NLB 1 /* MPI lower byte select */ +#define PIOMPI_NUB 2 /* MPI upper byte select */ + +#define LED1 (1<<8) /* LED 1 (linke LED) */ +#define LED2 (1<<9) /* LED 2 */ +#define LED3 (1<<10) /* LED 3 */ +#define LED4 (1<<11) /* LED 4 */ +#define LED5 (1<<12) /* LED 5 */ +#define LED6 (1<<13) /* LED 6 */ +#define LED7 (1<<14) /* LED 7 */ +#define LED8 (1<<15) /* LED 8 */ +#define ALL_LEDS (LED1|LED2|LED3|LED4|LED5|LED6|LED7|LED8) + +#define KEY1 (1<<3) /* TASTE 1 (linke Taste) auf PB3 */ +#define KEY2 (1<<4) /* TASTE 2 auf PB4 */ +#define KEY3 (1<<5) /* TASTE 3 auf PB5 */ +#define KEY4 (1<<9) /* TASTE 4 auf PA9/IRQ0 */ +#define ALL_KEYS (KEY1|KEY2|KEY3) +#endif /* pio_h */ diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/pio.inc b/Bachelor/Mikroprozessorsysteme2/mi2/h/pio.inc new file mode 100644 index 0000000..e694e7a --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/pio.inc @@ -0,0 +1,120 @@ +@---------------------------------------------------------------------------- +@ File Name : pio.inc +@ Object : Parallel I/O Header File +@ +@ 1.0 27/10/02 GR : Creation +@---------------------------------------------------------------------------- + +#ifndef pio_inc +#define pio_inc + + +@------------------------------------------------------------*/ +@ User Interface Parallel I/O Interface Structure Definition */ +@------------------------------------------------------------*/ + +PIO_PER = 0x0 @ PIO Enable Register +PIO_PDR = 0x4 @ PIO Disable Register +PIO_PSR = 0x8 @ PIO Status Register + @ Reserved 0xC +PIO_OER = 0x10 @ Output Enable Register +PIO_ODR = 0x14 @ Output Disable Register +PIO_OSR = 0x18 @ Output Status Register + @ Reserved 0x1C +PIO_IFER = 0x20 @ Input Filter Enable Register +PIO_IFDR = 0x24 @ Input Filter Disable Register +PIO_IFSR = 0x28 @ Input Filter Status Register + @ Reserved 0x2C +PIO_SODR = 0x30 @ Set Output Data Register +PIO_CODR = 0x34 @ Clear Output Data Register +PIO_ODSR = 0x38 @ Output Data Status Register +PIO_PDSR = 0x3C @ Pin Data Status Register +PIO_IER = 0x40 @ Interrupt Enable Register +PIO_IDR = 0x44 @ Interrupt Disable Register +PIO_IMR = 0x48 @ Interrupt Mask Register +PIO_ISR = 0x4C @ Interrupt Status Register +PIO_MDER = 0x50 @ Multi Driver Enable Register +PIO_MDDR = 0x54 @ Multi Driver Disable Register +PIO_MDSR = 0x58 @ Multi Driver Status Register + @ Reserved 0x5C + +PIOB_BASE = 0xFFFF0000 @ Parallel I/O Controller B +PIOA_BASE = 0xFFFEC000 @ Parallel I/O Controller A + +@ PIO Controller A +PIOTCLK3 = 0 @ Timer 3 Clock signal +PIOTIOA3 = 1 @ Timer 3 Signal A +PIOTIOB3 = 2 @ Timer 3 Signal B + +PIOTCLK4 = 3 @ Timer 4 Clock signal +PIOTIOA4 = 4 @ Timer 4 Signal A +PIOTIOB4 = 5 @ Timer 4 Signal B + +PIOTCLK5 = 6 @ Timer 5 Clock signal +PIOTIOA5 = 7 @ Timer 5 Signal A +PIOTIOB5 = 8 @ Timer 5 Signal B + +PIOIRQ0 = 9 @ External Interrupt 0 +PIOIRQ1 = 10 @ External Interrupt 1 +PIOIRQ2 = 11 @ External Interrupt 2 +PIOIRQ3 = 12 @ External Interrupt 3 +PIOFIQ = 13 @ Fast Interrupt + +PIOSCK0 = 14 @ USART 0 signal +PIOTXD0 = 15 @ USART 0 transmit data +PIORXD0 = 16 @ USART 0 receive data + +PIOSCK1 = 17 @ USART 1 clock signal +PIOTXD1 = 18 @ USART 1 transmit data +PIORXD1 = 19 @ USART 1 receive data + +PIOSCK2 = 20 @ USART 2 clock signal +PIOTXD2 = 21 @ USART 2 transmit data +PIORXD2 = 22 @ USART 2 receive data + +PIOSPCK = 23 @ SPI clock signal +PIOMISO = 24 @ SPI Master In Slave +PIOMOSI = 25 @ SPI Master Out Slave +PIONPCS0 = 26 @ SPI Peripheral Chip Select 0 +PIONSS = PIONPCS0 +PIONPCS1 = 27 @ SPI Peripheral Chip Select 1 +PIONPCS2 = 28 @ SPI Peripheral Chip Select 2 +PIONPCS3 = 29 @ SPI Peripheral Chip Select 3 + +@ PIO Controller B +PIOTCLK0 = 19 @ Timer 0 Clock signal input +PIOTIOA0 = 20 @ Timer 0 Signal A +PIOTIOB0 = 21 @ Timer 0 Signal B + +PIOTCLK1 = 22 @ Timer 1 Clock signal +PIOTIOA1 = 23 @ Timer 1 Signal A +PIOTIOB1 = 24 @ Timer 1 Signal B + +PIOTCLK2 = 25 @ Timer 2 Clock signal +PIOTIOA2 = 26 @ Timer 2 Signal A +PIOTIOB2 = 27 @ Timer 2 Signal B + +PIOMCKO = 17 @ Master Clock Output + +PIOBMS = 18 @ Boot Mode Select + +PIOMPI_NOE = 0 @ MPI output enable +PIOMPI_NLB = 1 @ MPI lower byte select +PIOMPI_NUB = 2 @ MPI upper byte select + +LED1 = (1<<8) @ LED 1 (linke LED) +LED2 = (1<<9) @ LED 2 +LED3 = (1<<10) @ LED 3 +LED4 = (1<<11) @ LED 4 +LED5 = (1<<12) @ LED 5 +LED6 = (1<<13) @ LED 6 +LED7 = (1<<14) @ LED 7 +LED8 = (1<<15) @ LED 8 +ALL_LEDS = (LED1|LED2|LED3|LED4|LED5|LED6|LED7|LED8) + +KEY1 = (1<<3) @ TASTE 1 (linke Taste) auf PB3 +KEY2 = (1<<4) @ TASTE 2 auf PB4 +KEY3 = (1<<5) @ TASTE 3 auf PB5 +KEY4 = (1<<9) @ TASTE 4 auf PA9/IRQ0 +ALL_KEYS = (KEY1|KEY2|KEY3) +#endif diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/pmc.h b/Bachelor/Mikroprozessorsysteme2/mi2/h/pmc.h new file mode 100644 index 0000000..4a7ab8b --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/pmc.h @@ -0,0 +1,42 @@ +//---------------------------------------------------------------------------- +// File Name : pmc.h +// Object : Power Management Controller Header File. +// +// 1.0 27/10/02 GR : Creation +//---------------------------------------------------------------------------- +#ifndef pmc_h +#define pmc_h + +#include "std_c.h" + +/*--------------------------------------------------*/ +/* Power Management Controller Structure Definition */ +/*--------------------------------------------------*/ + +typedef struct +{ + at91_reg PMC_SCER ; /* System Clock Enable Register */ + at91_reg PMC_SCDR ; /* System Clock Disable Register */ + at91_reg PMC_SCSR ; /* System Clock Status Register */ + at91_reg Reserved0 ; + at91_reg PMC_PCER ; /* Peripheral Clock Enable Register */ + at91_reg PMC_PCDR ; /* Peripheral Clock Disable Register */ + at91_reg PMC_PCSR ; /* Peripheral Clock Status Register */ +} StructPMC ; + +/*-----------------------------------------------*/ +/* Power Saving Control Register Bits Definition */ +/*-----------------------------------------------*/ + +#define PMC_ARM7DIS 0x1 +#define PMC_US0 0x4 +#define PMC_PCSR_ALL 0xffff + +/*------------------------------------------*/ +/* Power Management Controller Base Address */ +/*------------------------------------------*/ + +#define PMC_BASE (( StructPMC *) 0xFFFF4000) + + +#endif /* pmc_h */ diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/pmc.inc b/Bachelor/Mikroprozessorsysteme2/mi2/h/pmc.inc new file mode 100644 index 0000000..f58d547 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/pmc.inc @@ -0,0 +1,47 @@ +@---------------------------------------------------------------------------- +@ File Name : pmc.inc +@ Object : Power Management Controller Header File. +@ +@ 1.0 27/10/02 GR : Creation +@---------------------------------------------------------------------------- +#ifndef pmc_inc +#define pmc_inc + +@-------------------------------------------------- +@ Power Management Controller Structure Definition +@-------------------------------------------------- + +PMC_SCER = 0x0 @ System Clock Enable Register +PMC_SCDR = 0x4 @ System Clock Disable Register +PMC_SCSR = 0x8 @ System Clock Status Register +@ Reserved +PMC_PCER = 0x10 @ Peripheral Clock Enable Register +PMC_PCDR = 0x14 @ Peripheral Clock Disable Register +PMC_PCSR = 0x18 @ Peripheral Clock Status Register + +@----------------------------------------------- +@ Power Saving Control Register Bits Definition +@----------------------------------------------- + +PMC_ARM7DIS = 0x1 +PMC_US0 = (1<<2) +PMC_US1 = (1<<3) +PMC_US2 = (1<<4) +PMC_TC0 = (1<<6) +PMC_TC1 = (1<<7) +PMC_TC2 = (1<<8) +PMC_TC3 = (1<<9) +PMC_TC4 = (1<<10) +PMC_TC5 = (1<<11) +PMC_PIOA = (1<<13) +PMC_PIOB = (1<<14) +PMC_PCSR_ALL = 0xffff + +@------------------------------------------ +@ Power Management Controller Base Address +@------------------------------------------ + +PMC_BASE = 0xFFFF4000 + + +#endif diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/ser_io.h b/Bachelor/Mikroprozessorsysteme2/mi2/h/ser_io.h new file mode 100644 index 0000000..8bf3eb5 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/ser_io.h @@ -0,0 +1,18 @@ +//*---------------------------------------------------------------------------- +//* File Name : ser_io.h +//* Object : Standard C Header File +//* +//* 1.0 27/10/02 GR : Creation +//*---------------------------------------------------------------------------- + +#ifndef ser_io_h +#define ser_io_h + +void putchar(int); +unsigned char getchar(void); +void init_ser(void); +void puts(char*); +unsigned int gets(char*,int); +unsigned int getpw(char*,int); + +#endif /* ser_io_h */ diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/std_c.h b/Bachelor/Mikroprozessorsysteme2/mi2/h/std_c.h new file mode 100644 index 0000000..b55e229 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/std_c.h @@ -0,0 +1,30 @@ +//*---------------------------------------------------------------------------- +//* File Name : std_c.h +//* Object : Standard C Header File +//* +//* 1.0 27/10/02 GR : Creation +//*---------------------------------------------------------------------------- + +#ifndef std_c_h +#define std_c_h + +/*----------------*/ +/* Standard types */ +/*----------------*/ + +typedef unsigned int u_int ; +typedef unsigned short u_short ; +typedef unsigned char u_char ; + + +/* AT91 Register type */ +typedef volatile unsigned int at91_reg ; + +/*----------------*/ +/* Boolean values */ +/*----------------*/ + +#define TRUE 1 +#define FALSE 0 + +#endif /* std_c_h */ diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/tc.h b/Bachelor/Mikroprozessorsysteme2/mi2/h/tc.h new file mode 100644 index 0000000..19cc48b --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/tc.h @@ -0,0 +1,306 @@ +//----------------------------------------------------------------------------- +// File Name : tc.h +// Object : Timer Counter Header File +// +// 1.0 27/10/02 GR : Creation +//----------------------------------------------------------------------------- + +#ifndef tc_h +#define tc_h + +#include "std_c.h" + +/*-------------------------------------------*/ +/* Timer User Interface Structure Definition */ +/*-------------------------------------------*/ + +typedef struct +{ + at91_reg TC_CCR ; /* Control Register */ + at91_reg TC_CMR ; /* Mode Register */ + at91_reg Reserved0 ; + at91_reg Reserved1 ; + at91_reg TC_CV ; /* Counter value */ + at91_reg TC_RA ; /* Register A */ + at91_reg TC_RB ; /* Register B */ + at91_reg TC_RC ; /* Register C */ + at91_reg TC_SR ; /* Status Register */ + at91_reg TC_IER ; /* Interrupt Enable Register */ + at91_reg TC_IDR ; /* Interrupt Disable Register */ + at91_reg TC_IMR ; /* Interrupt Mask Register */ + at91_reg Reserved2 ; + at91_reg Reserved3 ; + at91_reg Reserved4 ; + at91_reg Reserved5 ; +} StructTC ; + +#define NB_TC_CHANNEL 3 + +typedef struct +{ + StructTC TC[NB_TC_CHANNEL] ; + at91_reg TC_BCR ; /* Block Control Register */ + at91_reg TC_BMR ; /* Block Mode Register */ +} StructTCBlock ; + +/*--------------------------------------------------------*/ +/* TC_CCR: Timer Counter Control Register Bits Definition */ +/*--------------------------------------------------------*/ +#define TC_CLKEN 0x1 +#define TC_CLKDIS 0x2 +#define TC_SWTRG 0x4 + +/*-----------------------------------------------------*/ +/* TC_CMR: Timer Counter Mode Register Bits Definition */ +/*-----------------------------------------------------*/ + +/*-----------------*/ +/* Clock Selection */ +/*-----------------*/ +#define TC_CLKS 0x7 +#define TC_CLKS_MCK2 0x0 +#define TC_CLKS_MCK8 0x1 +#define TC_CLKS_MCK32 0x2 +#define TC_CLKS_MCK128 0x3 +#define TC_CLKS_MCK1024 0x4 +#define TC_CLKS_XC0 0x5 +#define TC_CLKS_XC1 0x6 +#define TC_CLKS_XC2 0x7 + +/*-----------------*/ +/* Clock Inversion */ +/*-----------------*/ +#define TC_CLKI 0x8 + +/*------------------------*/ +/* Burst Signal Selection */ +/*------------------------*/ +#define TC_BURST 0x30 +#define TC_BURST_NONE 0x0 +#define TC_BUSRT_XC0 0x10 +#define TC_BURST_XC1 0x20 +#define TC_BURST_XC2 0x30 + +/*------------------------------------------------------*/ +/* Capture Mode : Counter Clock Stopped with RB Loading */ +/*------------------------------------------------------*/ +#define TC_LDBSTOP 0x40 + +/*-------------------------------------------------------*/ +/* Waveform Mode : Counter Clock Stopped with RC Compare */ +/*-------------------------------------------------------*/ +#define TC_CPCSTOP 0x40 + +/*-------------------------------------------------------*/ +/* Capture Mode : Counter Clock Disabled with RB Loading */ +/*--------------------------------------------------------*/ +#define TC_LDBDIS 0x80 + +/*--------------------------------------------------------*/ +/* Waveform Mode : Counter Clock Disabled with RC Compare */ +/*--------------------------------------------------------*/ +#define TC_CPCDIS 0x80 + +/*------------------------------------------------*/ +/* Capture Mode : External Trigger Edge Selection */ +/*------------------------------------------------*/ +#define TC_ETRGEDG 0x300 +#define TC_ETRGEDG_EDGE_NONE 0x0 +#define TC_ETRGEDG_RISING_EDGE 0x100 +#define TC_ETRGEDG_FALLING_EDGE 0x200 +#define TC_ETRGEDG_BOTH_EDGE 0x300 + +/*-----------------------------------------------*/ +/* Waveform Mode : External Event Edge Selection */ +/*-----------------------------------------------*/ +#define TC_EEVTEDG 0x300 +#define TC_EEVTEDG_EDGE_NONE 0x0 +#define TC_EEVTEDG_RISING_EDGE 0x100 +#define TC_EEVTEDG_FALLING_EDGE 0x200 +#define TC_EEVTEDG_BOTH_EDGE 0x300 + +/*--------------------------------------------------------*/ +/* Capture Mode : TIOA or TIOB External Trigger Selection */ +/*--------------------------------------------------------*/ +#define TC_ABETRG 0x400 +#define TC_ABETRG_TIOB 0x0 +#define TC_ABETRG_TIOA 0x400 + +/*------------------------------------------*/ +/* Waveform Mode : External Event Selection */ +/*------------------------------------------*/ +#define TC_EEVT 0xC00 +#define TC_EEVT_TIOB 0x0 +#define TC_EEVT_XC0 0x400 +#define TC_EEVT_XC1 0x800 +#define TC_EEVT_XC2 0xC00 + +/*--------------------------------------------------*/ +/* Waveform Mode : Enable Trigger on External Event */ +/*--------------------------------------------------*/ +#define TC_ENETRG 0x1000 + +/*----------------------------------*/ +/* RC Compare Enable Trigger Enable */ +/*----------------------------------*/ +#define TC_CPCTRG 0x4000 + +/*----------------*/ +/* Mode Selection */ +/*----------------*/ +#define TC_WAVE 0x8000 +#define TC_CAPT 0x0 + +/*-------------------------------------*/ +/* Capture Mode : RA Loading Selection */ +/*-------------------------------------*/ +#define TC_LDRA 0x30000 +#define TC_LDRA_EDGE_NONE 0x0 +#define TC_LDRA_RISING_EDGE 0x10000 +#define TC_LDRA_FALLING_EDGE 0x20000 +#define TC_LDRA_BOTH_EDGE 0x30000 + +/*-------------------------------------------*/ +/* Waveform Mode : RA Compare Effect on TIOA */ +/*-------------------------------------------*/ +#define TC_ACPA 0x30000 +#define TC_ACPA_OUTPUT_NONE 0x0 +#define TC_ACPA_SET_OUTPUT 0x10000 +#define TC_ACPA_CLEAR_OUTPUT 0x20000 +#define TC_ACPA_TOGGLE_OUTPUT 0x30000 + +/*-------------------------------------*/ +/* Capture Mode : RB Loading Selection */ +/*-------------------------------------*/ +#define TC_LDRB 0xC0000 +#define TC_LDRB_EDGE_NONE 0x0 +#define TC_LDRB_RISING_EDGE 0x40000 +#define TC_LDRB_FALLING_EDGE 0x80000 +#define TC_LDRB_BOTH_EDGE 0xC0000 + +/*-------------------------------------------*/ +/* Waveform Mode : RC Compare Effect on TIOA */ +/*-------------------------------------------*/ +#define TC_ACPC 0xC0000 +#define TC_ACPC_OUTPUT_NONE 0x0 +#define TC_ACPC_SET_OUTPUT 0x40000 +#define TC_ACPC_CLEAR_OUTPUT 0x80000 +#define TC_ACPC_TOGGLE_OUTPUT 0xC0000 + +/*-----------------------------------------------*/ +/* Waveform Mode : External Event Effect on TIOA */ +/*-----------------------------------------------*/ +#define TC_AEEVT 0x300000 +#define TC_AEEVT_OUTPUT_NONE 0x0 +#define TC_AEEVT_SET_OUTPUT 0x100000 +#define TC_AEEVT_CLEAR_OUTPUT 0x200000 +#define TC_AEEVT_TOGGLE_OUTPUT 0x300000 + +/*-------------------------------------------------*/ +/* Waveform Mode : Software Trigger Effect on TIOA */ +/*-------------------------------------------------*/ +#define TC_ASWTRG 0xC00000 +#define TC_ASWTRG_OUTPUT_NONE 0x0 +#define TC_ASWTRG_SET_OUTPUT 0x400000 +#define TC_ASWTRG_CLEAR_OUTPUT 0x800000 +#define TC_ASWTRG_TOGGLE_OUTPUT 0xC00000 + +/*-------------------------------------------*/ +/* Waveform Mode : RB Compare Effect on TIOB */ +/*-------------------------------------------*/ +#define TC_BCPB 0x1000000 +#define TC_BCPB_OUTPUT_NONE 0x0 +#define TC_BCPB_SET_OUTPUT 0x1000000 +#define TC_BCPB_CLEAR_OUTPUT 0x2000000 +#define TC_BCPB_TOGGLE_OUTPUT 0x3000000 + +/*-------------------------------------------*/ +/* Waveform Mode : RC Compare Effect on TIOB */ +/*-------------------------------------------*/ +#define TC_BCPC 0xC000000 +#define TC_BCPC_OUTPUT_NONE 0x0 +#define TC_BCPC_SET_OUTPUT 0x4000000 +#define TC_BCPC_CLEAR_OUTPUT 0x8000000 +#define TC_BCPC_TOGGLE_OUTPUT 0xC000000 + +/*-----------------------------------------------*/ +/* Waveform Mode : External Event Effect on TIOB */ +/*-----------------------------------------------*/ +#define TC_BEEVT 0x10000000 +#define TC_BEEVT_OUTPUT_NONE 0x0 +#define TC_BEEVT_SET_OUTPUT 0x40000000 +#define TC_BEEVT_CLEAR_OUTPUT 0x80000000 +#define TC_BEEVT_TOGGLE_OUTPUT 0xC0000000 + +/*- -----------------------------------------------*/ +/* Waveform Mode : Software Trigger Effect on TIOB */ +/*-------------------------------------------------*/ +#define TC_BSWTRG 0xC0000000 +#define TC_BSWTRG_OUTPUT_NONE 0x0 +#define TC_BSWTRG_SET_OUTPUT 0x40000000 +#define TC_BSWTRG_CLEAR_OUTPUT 0x80000000 +#define TC_BSWTRG_TOGGLE_OUTPUT 0xC0000000 + +/*-----------------------------------------------*/ +/* TC_SR: Timer Counter Status Register Bits Definition */ +/*-----------------------------------------------*/ + +#define TC_COVFS 0x1 /* Counter Overflow Status */ +#define TC_LOVRS 0x2 /* Load Overrun Status */ +#define TC_CPAS 0x4 /* RA Compare Status */ +#define TC_CPBS 0x8 /* RB Compare Status */ +#define TC_CPCS 0x10 /* RC Compare Status */ +#define TC_LDRAS 0x20 /* RA Loading Status */ +#define TC_LDRBS 0x40 /* RB Loading Status */ +#define TC_ETRGS 0x80 /* External Trigger Status */ +#define TC_CLKSTA 0x10000 /* Clock Status */ +#define TC_MTIOA 0x20000 /* TIOA Mirror */ +#define TC_MTIOB 0x40000 /* TIOB Status */ + +/*------------------------------------------------------*/ +/* TC_BCR: Timer Counter Block Control Register Bits Definition */ +/*------------------------------------------------------*/ + +#define TC_SYNC 0x1 /* Synchronisation Trigger */ + +/*---------------------------------------------------*/ +/* TC_BMR: Timer Counter Block Mode Register Bits Definition */ +/*---------------------------------------------------*/ +#define TC_TC0XC0S 0x3 /* External Clock Signal 0 Selection */ +#define TC_TCLK0XC0 0x0 +#define TC_NONEXC0 0x1 +#define TC_TIOA1XC0 0x2 +#define TC_TIOA2XC0 0x3 + +#define TC_TC1XC1S 0xC /* External Clock Signal 1 Selection */ +#define TC_TCLK1XC1 0x0 +#define TC_NONEXC1 0x4 +#define TC_TIOA0XC1 0x8 +#define TC_TIOA2XC1 0xC + +#define TC_TC2XC2S 0x30 /* External Clock Signal 2 Selection */ +#define TC_TCLK2XC2 0x0 +#define TC_NONEXC2 0x10 +#define TC_TIOA0XC2 0x20 +#define TC_TIOA1XC2 0x30 + +/*-----------------------*/ +/* Peripheral Memory Map */ +/*-----------------------*/ + +#define TCB0_BASE ((StructTC *)0xFFFD0000) /* Channels 0, 1, 2 */ +#define TCB1_BASE ((StructTC *)0xFFFD0040) /* Channels 0, 1, 2 */ +#define TCB2_BASE ((StructTC *)0xFFFD0080) /* Channels 0, 1, 2 */ +#define TC0_BCR ((at91_reg *)0xFFFD00C0) +#define TC0_BMR ((at91_reg *)0xFFFD00C4) + + +#define TCB3_BASE ((StructTC *)0xFFFD4000) /* Channels 3, 4, 5 */ +#define TCB4_BASE ((StructTC *)0xFFFD4040) /* Channels 0, 1, 2 */ +#define TCB5_BASE ((StructTC *)0xFFFD4080) /* Channels 0, 1, 2 */ +#define TC1_BCR ((at91_reg *)0xFFFD40C0) +#define TC1_BMR ((at91_reg *)0xFFFD40C4) + + +#endif /* tc_h */ + diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/usart.h b/Bachelor/Mikroprozessorsysteme2/mi2/h/usart.h new file mode 100644 index 0000000..d96656d --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/usart.h @@ -0,0 +1,120 @@ +//*----------------------------------------------------------------------------- +//* File Name : usart.h +//* Object : USART Header File. +//* +//* 1.0 27/10/02 GR : Creation +//*---------------------------------------------------------------------------- + +#ifndef usart_h +#define usart_h + +#include "std_c.h" + + +/*-------------------------------------------*/ +/* USART User Interface Structure Definition */ +/*-------------------------------------------*/ + +typedef struct +{ + at91_reg US_CR ; /* Control Register */ + at91_reg US_MR ; /* Mode Register */ + at91_reg US_IER ; /* Interrupt Enable Register */ + at91_reg US_IDR ; /* Interrupt Disable Register */ + at91_reg US_IMR ; /* Interrupt Mask Register */ + at91_reg US_CSR ; /* Channel Status Register */ + at91_reg US_RHR ; /* Receive Holding Register */ + at91_reg US_THR ; /* Transmit Holding Register */ + at91_reg US_BRGR ; /* Baud Rate Generator Register */ + at91_reg US_RTOR ; /* Receiver Timeout Register */ + at91_reg US_TTGR ; /* Transmitter Time-guard Register */ + at91_reg Reserved ; + at91_reg US_RPR ; /* Receiver Pointer Register */ + at91_reg US_RCR ; /* Receiver Counter Register */ + at91_reg US_TPR ; /* Transmitter Pointer Register */ + at91_reg US_TCR ; /* Transmitter Counter Register */ +} StructUSART ; + +/*--------------------------*/ +/* US_CR : Control Register */ +/*--------------------------*/ + +#define US_RSTRX 0x0004 /* Reset Receiver */ +#define US_RSTTX 0x0008 /* Reset Transmitter */ +#define US_RXEN 0x0010 /* Receiver Enable */ +#define US_RXDIS 0x0020 /* Receiver Disable */ +#define US_TXEN 0x0040 /* Transmitter Enable */ +#define US_TXDIS 0x0080 /* Transmitter Disable */ +#define US_RSTSTA 0x0100 /* Reset Status Bits */ +#define US_STTBRK 0x0200 /* Start Break */ +#define US_STPBRK 0x0400 /* Stop Break */ +#define US_STTTO 0x0800 /* Start Time-out */ +#define US_SENDA 0x1000 /* Send Address */ + +/*-----------------------*/ +/* US_MR : Mode Register */ +/*-----------------------*/ + +#define US_CLKS 0x0030 /* Clock Selection */ +#define US_CLKS_MCK 0x00 /* Master Clock */ +#define US_CLKS_MCK8 0x10 /* Master Clock divided by 8 */ +#define US_CLKS_SCK 0x20 /* External Clock */ +#define US_CLKS_SLCK 0x30 /* Slow Clock */ + +#define US_CHRL 0x00C0 /* Byte Length */ +#define US_CHRL_5 0x00 /* 5 bits */ +#define US_CHRL_6 0x40 /* 6 bits */ +#define US_CHRL_7 0x80 /* 7 bits */ +#define US_CHRL_8 0xC0 /* 8 bits */ + +#define US_SYNC 0x0100 /* Synchronous Mode Enable */ + +#define US_PAR 0x0E00 /* Parity Mode */ +#define US_PAR_EVEN 0x00 /* Even Parity */ +#define US_PAR_ODD 0x200 /* Odd Parity */ +#define US_PAR_SPACE 0x400 /* Space Parity to 0 */ +#define US_PAR_MARK 0x600 /* Marked Parity to 1 */ +#define US_PAR_NO 0x800 /* No Parity */ +#define US_PAR_MULTIDROP 0xC00 /* Multi-drop Mode */ + +#define US_NBSTOP 0x3000 /* Stop Bit Number */ +#define US_NBSTOP_1 0x0000 /* 1 Stop Bit */ +#define US_NBSTOP_1_5 0x1000 /* 1.5 Stop Bits */ +#define US_NBSTOP_2 0x2000 /* 2 Stop Bits */ + +#define US_CHMODE 0xC000 /* Channel Mode */ +#define US_CHMODE_NORMAL 0x0000 /* Normal Mode */ +#define US_CHMODE_AUTOMATIC_ECHO 0x4000 /* Automatic Echo */ +#define US_CHMODE_LOCAL_LOOPBACK 0x8000 /* Local Loopback */ +#define US_CHMODE_REMOTE_LOOPBACK 0xC000 /* Remote Loopback */ + +#define US_MODE9 0x20000 /* 9 Bit Mode */ + +#define US_CLKO 0x40000 /* Baud Rate Output Enable */ + + +/*---------------------------------------------------------------*/ +/* US_IER, US_IDR, US_IMR, US_IMR: Status and Interrupt Register */ +/*---------------------------------------------------------------*/ + +#define US_RXRDY 0x001 /* Receiver Ready */ +#define US_TXRDY 0x002 /* Transmitter Ready */ +#define US_RXBRK 0x004 /* Receiver Break */ +#define US_ENDRX 0x008 /* End of Receiver PDC Transfer */ +#define US_ENDTX 0x010 /* End of Transmitter PDC Transfer */ +#define US_OVRE 0x020 /* Overrun Error */ +#define US_FRAME 0x040 /* Framing Error */ +#define US_PARE 0x080 /* Parity Error */ +#define US_TIMEOUT 0x100 /* Receiver Timeout */ +#define US_TXEMPTY 0x200 /* Transmitter Empty */ + +#define US_MASK_IRQ_TX (US_TXRDY | US_ENDTX | US_TXEMPTY) +#define US_MASK_IRQ_RX (US_RXRDY | US_ENDRX | US_TIMEOUT) +#define US_MASK_IRQ_ERROR (US_PARE | US_FRAME | US_OVRE | US_RXBRK) + + +#define USART2 ((StructUSART*)0xFFFC8000) /* USART 2 */ +#define USART1 ((StructUSART*)0xFFFC4000) /* USART 1 */ +#define USART0 ((StructUSART*)0xFFFC0000) /* USART 0 */ + +#endif /* usart_h */ diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/usart.inc b/Bachelor/Mikroprozessorsysteme2/mi2/h/usart.inc new file mode 100644 index 0000000..7cc4b5f --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/usart.inc @@ -0,0 +1,115 @@ +@*----------------------------------------------------------------------------- +@* File Name : usart.inc +@* Object : USART Header File. +@* +@* 1.0 01/04/00 : Creation +@*---------------------------------------------------------------------------- + +#ifndef usart_inc +#define usart_inc + + +@------------------------------------------- +@ USART User Interface Structure Definition +@------------------------------------------- + +US_CR = 0x0 @ Control Register +US_MR = 0x4 @ Mode Register +US_IER = 0x8 @ Interrupt Enable Register +US_IDR = 0xc @ Interrupt Disable Register +US_IMR = 0x10 @ Interrupt Mask Register +US_CSR = 0x14 @ Channel Status Register +US_RHR = 0x18 @ Receive Holding Register +US_THR = 0x1c @ Transmit Holding Register +US_BRGR = 0x20 @ Baud Rate Generator Register +US_RTOR = 0x24 @ Receiver Timeout Register +US_TTGR = 0x28 @ Transmitter Time-guard Register + @ Reserved +US_RPR = 0x30 @ Receiver Pointer Register +US_RCR = 0x34 @ Receiver Counter Register +US_TPR = 0x38 @ Transmitter Pointer Register +US_TCR = 0x3c @ Transmitter Counter Register + +@-------------------------- +@ US_CR : Control Register +@-------------------------- + +US_RSTRX = 0x0004 @ Reset Receiver +US_RSTTX = 0x0008 @ Reset Transmitter +US_RXEN = 0x0010 @ Receiver Enable +US_RXDIS = 0x0020 @ Receiver Disable +US_TXEN = 0x0040 @ Transmitter Enable +US_TXDIS = 0x0080 @ Transmitter Disable +US_RSTSTA = 0x0100 @ Reset Status Bits +US_STTBRK = 0x0200 @ Start Break +US_STPBRK = 0x0400 @ Stop Break +US_STTTO = 0x0800 @ Start Time-out +US_SENDA = 0x1000 @ Send Address + +@----------------------- +@ US_MR : Mode Register +@----------------------- + +US_CLKS = 0x0030 @ Clock Selection +US_CLKS_MCK = 0x00 @ Master Clock +US_CLKS_MCK8 = 0x10 @ Master Clock divided by 8 +US_CLKS_SCK = 0x20 @ External Clock +US_CLKS_SLCK = 0x30 @ Slow Clock + +US_CHRL = 0x00C0 @ Byte Length +US_CHRL_5 = 0x00 @ 5 bits +US_CHRL_6 = 0x40 @ 6 bits +US_CHRL_7 = 0x80 @ 7 bits +US_CHRL_8 = 0xC0 @ 8 bits + +US_SYNC = 0x0100 @ Synchronous Mode Enable + +US_PAR = 0x0E00 @ Parity Mode +US_PAR_EVEN = 0x00 @ Even Parity +US_PAR_ODD = 0x200 @ Odd Parity +US_PAR_SPACE = 0x400 @ Space Parity to 0 +US_PAR_MARK = 0x600 @ Marked Parity to 1 +US_PAR_NO = 0x800 @ No Parity +US_PAR_MULTIDROP = 0xC00 @ Multi-drop Mode + +US_NBSTOP = 0x3000 @ Stop Bit Number +US_NBSTOP_1 = 0x0000 @ 1 Stop Bit +US_NBSTOP_1_5 = 0x1000 @ 1.5 Stop Bits +US_NBSTOP_2 = 0x2000 @ 2 Stop Bits + +US_CHMODE = 0xC000 @ Channel Mode +US_CHMODE_NORMAL = 0x0000 @ Normal Mode +US_CHMODE_AUTOMATIC_ECHO = 0x4000 @ Automatic Echo +US_CHMODE_LOCAL_LOOPBACK = 0x8000 @ Local Loopback +US_CHMODE_REMOTE_LOOPBACK = 0xC000 @ Remote Loopback + +US_MODE9 = 0x20000 @ 9 Bit Mode + +US_CLKO = 0x40000 @ Baud Rate Output Enable + + +@--------------------------------------------------------------- +@ US_IER, US_IDR, US_IMR, US_IMR: Status and Interrupt Register +@--------------------------------------------------------------- + +US_RXRDY = 0x001 @ Receiver Ready +US_TXRDY = 0x002 @ Transmitter Ready +US_RXBRK = 0x004 @ Receiver Break +US_ENDRX = 0x008 @ End of Receiver PDC Transfer +US_ENDTX = 0x010 @ End of Transmitter PDC Transfer +US_OVRE = 0x020 @ Overrun Error +US_FRAME = 0x040 @ Framing Error +US_PARE = 0x080 @ Parity Error +US_TIMEOUT = 0x100 @ Receiver Timeout +US_TXEMPTY = 0x200 @ Transmitter Empty + +US_MASK_IRQ_TX = (US_TXRDY | US_ENDTX | US_TXEMPTY) +US_MASK_IRQ_RX = (US_RXRDY | US_ENDRX | US_TIMEOUT) +US_MASK_IRQ_ERROR = (US_PARE | US_FRAME | US_OVRE | US_RXBRK) + + +USART2_BASE = 0xFFFC8000 @ USART 2 +USART1_BASE = 0xFFFC4000 @ USART 1 +USART0_BASE = 0xFFFC0000 @ USART 0 + +#endif |